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LM2619MTC Datasheet(PDF) 12 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # LM2619MTC
Description  500mA Step-Down DC-DC Converter
PDF  16 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM2619MTC Datasheet(HTML) 12 Page - National Semiconductor (TI)

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Device Information (Continued)
from a pulse or function generator can develop under/
overshoot as high as 10V at the end of an improperly termi-
nated cable.
OVERVOLTAGE PROTECTION
The LM2619MTC has an over-voltage comparator that pre-
vents the output voltage from rising too high when the device
is left in PWM mode under low-load conditions. When the
output voltage rises by about 100mV (Figure 3) over its
regulation threshold, the OVP comparator inhibits PWM op-
eration to skip pulses until the output voltage returns to the
regulation threshold. When resistor dividers are used the
OVP threshold at the output will be the value of the threshold
at the feedback pin times the resistor divider ratio. In over
voltage protection, output voltage and ripple will increase.
SHUTDOWN MODE
Setting the EN digital input pin low (<0.4V) places the
LM2619MTC in a 0.02µA (typ) shutdown mode. During shut-
down, the PFET switch, NFET synchronous rectifier, refer-
ence, control and bias circuitry of the LM2619MTC are
turned off. Setting EN high enables normal operation. While
turning on, soft start is activated.
EN should be set low to turn off the LM2619MTC during
system power-up and undervoltage conditions when the
supply is less than the 2.8V minimum operating voltage. The
LM2619MTC is designed for compact portable applications,
such as mobile phones. In such applications, the system
controller determines power supply sequencing. Although
the LM2619MTC is typically well behaved at low input volt-
ages, this is not guaranteed.
INTERNAL SYNCHRONOUS RECTIFICATION
While in PWM mode, the LM2619MTC uses an internal
NFET as a synchronous rectifier to reduce rectifier forward
voltage drop and associated power loss. Synchronous rec-
tification provides a significant improvement in efficiency
whenever the output voltage is relatively low compared to
the voltage drop across an ordinary rectifier diode.
The internal NFET synchronous rectifier is turned on during
the inductor current down slope during the second part of
each cycle. The synchronous rectifier is turned off prior to the
next cycle, or when the inductor current ramps to zero at light
loads. The NFET is designed to conduct through its intrinsic
body diode during transient intervals before it turns on, elimi-
nating the need for an external diode.
CURRENT LIMITING
A current limit feature allows the LM2619MTC to protect
itself and external components during overload conditions. In
PWM mode cycle-by-cycle current limit is normally used. If
an excessive load pulls the voltage at the feedback pin down
to approximately 0.7V, then the device switches to a timed
current limit mode. In timed current limit mode the internal
P-FET switch is turned off after the current comparator trips
and the beginning of the next cycle is inhibited for 2.5µs to
force the instantaneous inductor current to ramp down to a
safe value. Timed current limit mode prevents the loss of
current control seen in some products when the voltage at
the feedback pin is pulled low in serious overload conditions.
DROPOUT CONSIDERATIONS
The LM2619MTC can be used to provide fixed output volt-
ages by using external feedback resistors. The output volt-
age can be set from 1.5V to 3.6V. The internal reference
voltage for the error amplifier is 1.5V. In cases where the
output voltage is set to 2.5V or higher, the part will go into
dropout or 100% duty cycle when the input voltage gets
close to the set output voltage. Near dropout the on time of
the P-FET may exceed one PWM clock cycle and cause
higher ripple on the output for load currents greater than
300mA. This increased ripple will exist for a narrow range of
input voltages close to the 100% duty cycle and once the
input voltage goes down further the P-FET will be fully on.
See Setting the Output Voltage in the Application Information
section for further details.
In dropout conditions the output voltage is V
IN −IOUT (Rdc +
R
DSON (P)) where Rdc is the series resistance of the inductor
and R
DSON (P) is the on resistance of the PFET.
Load Transient Response
(Circuit in Figure 3)
20065127
FIGURE 8.
Line Transient Response
(Circuit in Figure 3)
20065128
FIGURE 9.
www.national.com
12
PrintDate=2003/08/20 PrintTime=18:54:05 801627bc ds200651_p Rev. No. 1.25
cmserv
Proof
Seq=12



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