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TS4100 Datasheet(PDF) 13 Page - Silicon Laboratories |
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TS4100 Datasheet(HTML) 13 Page - Silicon Laboratories |
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13 / 24 page ![]() Parameter Symbol Conditions Min Typ Max Units ADDA/B/C, INH Turn- On Time tON VDD = 5.25 V RL = 5 kΩ, CL = 35 pF See Figure 2.6 TS4100-TS4102 Address/Enable Turn- On/Off Time Test Set- up on page 7 7 9 µs ADDA/B/C, INH Turn- Off Time tOFF 0.5 0.8 µs Break-Before-Make Delay tBBM VNO/C = 5.25 V RL = 5 kΩ, CL = 35 pF See Figure 2.7 TS4100-TS4102 Break-Before-Make Test Setup on page 86 6.5 8.2 µs Charge-Injection Q VNO/C = 5.25 V, CL = 1 nF See Figure 2.8 TS4100-TS4102 Charge Injec- tion Test Setup on page 8. 10 pC Off-Isolation VISO f = 10 kHz, VNO/C = 1 VRMS, RL = 100 kΩ, CL = 50 pF See Figure 2.9 TS4100-TS4102 Off-Isolation Test Setup on page 9. –87 dB TS4101,TS4102 Crosstalk VCT f = 10 kHz, VNO/C = 1 VRMS, RL = 100 kΩ See Figure 2.11 TS4101 Crosstalk Test Setup on page 10 and Figure 2.12 TS4102 Crosstalk Test Setup on page 10. –77 dB Total Harmonic Distor- tion THD f = 10 kHz, VNO/C = 400 mVPP (500 mV Offset) CL = 15 pF, RNO/C = RCOM = 600 Ω 0.16 % Power Supply Supply Current IQ VDD = 5.25 V VNO/C = 0 or VDD TA = 25 ºC 675 765 nA 950 nA Supply Voltage VDD 0.8 5.25 V Note: 1. VDD = 0.8 V to 5.25 V; INH = GND unless otherwise specified; TA= –40 °C to +85 °C. Typical values are at TA = +25 °C; All specifications are 100% tested at TA = +85°C. Specification limits over temperature (TA = TMIN to TMAX) are guaranteed by device characterization, not production tested. 2. On-Resistance Flatness is defined by the following equation: (RON0.5V – RON5.25V / RON0.5V) x 100. 3. Tested at VNO/C = 0.5 V and VNO/C = 5.25 V and guaranteed by design from VNO/C = 0 V to VNO/C = 5.25 V. 4. ΔRON=RONMAX−RONMIN 5. Leakage parameters are guaranteed by correlation at TA = 25 ºC and are 100% tested at the maximum rated hot operating tem- perature. 6. tBBM = tON − tOFF. Not production tested. TS4100/01/02 Data Sheet Electrical Characteristics silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 12 |
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