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ADS5270IPFP Datasheet(PDF) 1 Page - Burr-Brown (TI) |
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ADS5270IPFP Datasheet(HTML) 1 Page - Burr-Brown (TI) |
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1 / 18 page ![]() FEATURES D Maximum Sample Rate: 40MSPS D 12-Bit Resolution D No Missing Codes D Power Dissipation: 907mW D CMOS Technology D Simultaneous Sample-and-Hold D 70.5dB SNR at 10MHz IF D Internal and External References D 3.3V Digital/Analog Supply D Serialized LVDS Outputs D Integrated Frame and Synch Patterns D MSB and LSB First Modes D Option to Double LVDS Clock Output Currents D Pin- and Format-Compatible Family D TQFP-80 PowerPAD Package APPLICATIONS D Portable Ultrasound Systems D Tape Drives D Test Equipment D Optical Networking DESCRIPTION The ADS5270 is a high-performance, 40MSPS, 8-channel, parallel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size. An integrated phase lock loop multiplies the incoming ADC sampling clock by a factor of 12. This 12x clock is used in the process of serializing the data output from each channel. The 12x clock is also used to generate a 1x and a 6x clock, both of which are transmitted as LVDS clock outputs. The 6x clock is denoted by the differential pair LCLKP and LCLKN, while the 1x clock is denoted by ADCLKP and ADCLKN. The word output of each ADC channel can be transmitted either as MSB or LSB first. The bit coinciding with the rising edge of the 1x clock output is the first bit of the word. Data is to be latched by the receiver on both the rising and falling edges of the 6x clock. The ADS5270 provides internal references, or can optionally be driven with external references. Best performance can be achieved through the internal reference mode. The device is available in a PowerPAD TQFP-80 package and is specified over a −40 °C to +85°C operating range. 12−Bit ADC PLL S/H Serializer 1X ADCLK 6X ADCLK IN1P ADCLK IN1N OUT1P OUT1N 12−Bit ADC S/H Serializer IN2 P IN2N OUT2P OUT2N 12−Bit ADC S/H Serializer IN3P IN3N OUT3P OUT3 N LCLKP LCLKN ADCLKP ADCLKN 12−Bit ADC S/H Serializer IN4P IN4N OUT4P OUT4N 12−Bit ADC S/H Serializer IN5P IN5 N OUT5P OUT5N 12−Bit ADC S/H Serializer IN6P IN6N OUT6P OUT6N 12−Bit ADC S/H Serializer IN7P IN7N OUT7P OUT7N 12−Bit ADC S/H Serializer Reference IN8P IN8 N INT/EXT OUT8P OUT8 N Registers Control ADS5270 SBAS293D − JANUARY 2004 − REVISED MAY 2004 8-Channel, 12-Bit, 40MSPS ADC with Serial LVDS Interface PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. www.ti.com Copyright 2004, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a registered trademark of Texas Instruments. All other trademarks are the property of their respective owners. |
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