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LP5912

SNVSA77D – DECEMBER 2015 – REVISED NOVEMBER 2016

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Feature Description (continued)

The LP5912 output employs an internal 100-

Ω (typical) pulldown resistance to discharge the output when the EN

pin is low. Note that if the LP5912 EN pin is low (the device is OFF) and the OUT pin is held high by a secondary

supply, current flows from the secondary supply through the automatic discharge pulldown resistor to ground.

The LP5912 input is protected against reverse current when output voltage is higher than the input. In the event

that extra output capacitance is used at the output, a power-down transient at the input would normally cause a

large reverse current through a conventional regulator. The LP5912 includes a reverse voltage detector that trips

any reverse current from the OUT pin from flowing to the IN pin.

If the LP5912 EN pin is low (the LP5912 is OFF) and the OUT pin is held high by a secondary supply, current

flows from the secondary supply through the automatic discharge pulldown resistor to ground. This is not reverse

current, this is automatic discharge pulldown current.

The internal current limit circuit is used to protect the LDO against high-load current faults or shorting events. The

sources constant current. Therefore, the output voltage falls when load impedance decreases. Note also that if a

current limit occurs and the resulting output voltage is low, excessive power may be dissipated across the LDO,

resulting in a thermal shutdown of the output.

Thermal shutdown disables the output when the junction temperature rises to approximately 160°C, which allows

the device to cool. When the junction temperature cools to approximately 145°C, the output circuitry enables.

Based on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may

cycle on and off. This thermal cycling limits the dissipation of the regulator and protects it from damage as a

result of overheating.

8.3.6 Power-Good Output (PG)

The LP5912 device has a power-good function that works by toggling the state of the PG output pin. When the

becomes high impedance. By connecting a pullup resistor to an external supply, any downstream device can

receive PG as a logic signal. Make sure that the external pullup supply voltage results in a valid logic signal for

the receiving device or devices. Use a pullup resistor from 10 k

Ω to 100 kΩ for best results.

In power-good function, the PG output pin being pulled high is typically delayed 140 µs after the output voltage

If the PG function is not needed, the pullup resistor can be eliminated, and the PG pin can be either connected to

ground or left floating.