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AD7403

Data Sheet

To reconstruct the original information, this output must be

digitally filtered and decimated. A sinc3 filter is recommended

because it is one order higher than that of the AD7403 modulator,

which is a second-order modulator. If a 256 decimation rate is

used, the resulting 16-bit word rate is 78.1 kSPS, assuming a

20 MHz external clock frequency. See the Digital Filter section

for more detailed information on the sinc filter implementation.

Figure 29 shows the transfer function of the AD7403 relative to

the 16-bit output.

65535

58368

SPECIFIED RANGE

ANALOG INPUT

7168

–320mV

–250mV

+250mV +320mV

Figure 29. Filtered and Decimated 16-Bit Transfer Function

DIFFERENTIAL INPUTS

The analog input to the modulator is a switched capacitor

design. The analog signal is converted into charge by highly

linear sampling capacitors. A simplified equivalent circuit

diagram of the analog input is shown in Figure 30. A signal

source driving the analog input must provide the charge onto the

sampling capacitors every half MCLKIN cycle and settle to the

required accuracy within the next half cycle.

φA

φB

300Ω

VIN–

φA

φB

300Ω

VIN+

1.9pF

φA

MCLKIN

Figure 30. Analog Input Equivalent Circuit

Because the AD7403 samples the differential voltage across its

analog inputs, low noise performance is attained with an input

circuit that provides low common-mode noise at each input.

DIGITAL OUTPUT

The AD7403 MDAT output driver is a slew rate limited driver.

This driver lowers electromagnetic emissions, thus minimizing

electromagnetic interference (EMI), both conducted and

radiated.

Rev. B | Page 16 of 24

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