Circuit Note

CN-0229

Rev. 0 | Page 3 of 6

–0.3

–0.2

–0.1

0

0.1

0.2

0.3

DAC CODE

Use the external 54 V, 600 W transient voltage suppressors (TVSs)

as the first stage of enhanced ESD protection. Place power Schottky

diodes in series with a 1 kΩ, 0.5 W resistor on the VSENSE+ and

VSENSE− pins of the AD5750-2, and place a 50 mA, 30 V

polyswitch on the VOUT and IOUT pins. These protective circuits

are included in the EVAL-CN0229-SDPZ circuit board to provide

50 V overvoltage protection and 50 mA overcurrent protection.

The optional external protection circuits are not shown in the

simplified schematic of Figure 1 but can be found in the detailed

schematic (EVAL-CN0229-SDPZ-PADSSchematic pdf file)

in the CN0229 Design Support package:

http://www.analog.com/CN0229-DesignSupport.

Construct the circuit on a multilayer printed circuit board (PCB)

board with a large area ground plane. Use proper layout,

grounding, and decoupling techniques to achieve optimum

system performance and low EMI (see Tutorial MT-031,

Grounding Data Converters and Solving the Mystery of "AGND"

and "DGND," and Tutorial MT-101, Decoupling Techniques).

Figure 3. DNL for 0 V to 5 V Output Range

–0.01

0

0.01

0.02

DAC CODE

Measurements

Integral nonlinearity (INL), differential nonlinearity (DNL), and

output error are the most important specifications for PLC, DCS,

and other process control systems. The AD5750-2 has highly

flexible and configurable output ranges that can be tailored to

meet the needs of the application. Measurements of INL, DNL,

and output error for the circuit are shown in Figure 2, Figure 3,

and Figure 4, respectively. This data was taken at 25°C in the

voltage output mode. The AD5750-2 range was set for 0 V to

5 V. The test results for all the other ranges are listed in Table 1.

–1.0

–0.5

0.0

0

1.0

1.5

DAC CODE

Figure 4. Output Error for 0 V to 5 V Output Range

Figure 2. INL for 0 V to 5 V Output Range