| Electronic Components Datasheet Search |
|
X3101 Datasheet(PDF) 13 Page - Xicor Inc. |
|
|
|||||||||||||||||||||||||||||
X3101 Datasheet(HTML) 13 Page - Xicor Inc. |
|
13 / 40 page ![]() X3100/X3101 – Preliminary Information Characteristics subject to change without notice. 13 of 40 REV 1.1.8 12/10/02 www.xicor.com over-charge and over-discharge protection circuitry is on for approximately 2ms in each 125ms period. Over- current monitoring is continuous. In monitor mode (see page 20) over-charge and over-discharge monitoring is also continuous. Over-charge Protection The X3100 and X3101 monitor the voltage on each battery cell (VCELL). If for any cell, VCELL > VOV for a time exceeding TOV, then the Charge FET will be switched OFF (OVP/LMON=VCC). The device has now entered Over-charge protection mode (Figure 5). The status of the discharge FET (via pin UVP) will remain unaffected. While in over-charge protection mode, it is possible to change the state of the OVPC bit in the control register such that OVP/LMON=Vss (Charge FET=ON). Although the OVPC bit in the control register can be changed, the change will not be seen at pin OVP until the X3100 or X3101 returns from over-charge protection mode. The over-charge detection delay TOV, is varied using a capacitor (COV) connected between pin OVT and GND. A typical delay time is shown in Table 10. The delay TOV that results from a particular capacitance COV, can be approximated by the following linear equation: TOV (s) ≈ 10 x COV (µF). Table 19. Typical over-charge detection time The device further continues to monitor the battery cell voltages, and is released from over-charge protection mode when VCELL< VOVR, for all cells. When the X3100 or X3101 is released from over-charge protection mode, the charge FET is automatically switched ON (OVP/LMON=VSS). When the device returns from over- charge protection mode, the status of the discharge FET (pin UVP/OCP) remains unaffected. The value of VOV can be selected from the values shown in Table 4 by setting bits VOV1, VOV0. These bits are set by using the WCFIG instruction to write to the configuration register. Figure 5. Over-charge Protection Mode—Event Diagram Symbol COV Delay TOV 0.1µF 1.0s (Typ) VCELL OVP/LMON Normal Operation Mode Over-charge VOV VOVR TOV Protection Mode Normal Operation Mode VCC VSS Event 0 1 2 3 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |