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X3101 Datasheet(PDF) 2 Page - Xicor Inc. |
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X3101 Datasheet(HTML) 2 Page - Xicor Inc. |
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2 / 40 page ![]() X3100/X3101 – Preliminary Information Characteristics subject to change without notice. 2 of 40 REV 1.1.8 12/10/02 www.xicor.com PRINCIPLES OF OPERATION The X3100 and X3101 provide two distinct levels of functionality and battery cell protection: First, in Normal mode, the device periodically checks each cell for an over-charge and over-discharge state, while continuously watching for a pack over-current condition. A protection mode violation results from an over-charge, over-discharge, or over-current state. The thresholds for these states are selected by the user through software. When one of these conditions occur, a Discharge FET or a Charge FET or both FETs are turned off to protect the battery pack. In an over- discharge condition, the X3100 and X3101 devices go into a low power sleep mode to conserve battery power. During sleep, the voltage regulator turns off, removing power from the microcontroller to further reduce pack current. Second, in Monitor mode, a microcontroller with A/D converter measures battery cell voltage and pack current via pin AO and the X3100 or X3101 on-board MUX. The user can thus implement protection, charge/discharge, cell balancing or gas gauge software algorithms to suit the specific application and characteristics of the cells used. While monitoring these voltages, all protection circuits are on continuously. In a typical application, the microcontroller is also programmed to provide an SMBus interface along with the Smart Battery System interface protocols. These additions allow an X3100 or X3101 based module to adhere to the latest industry battery pack standards. PIN CONFIGURATION PIN NAMES PIN DESCRIPTIONS Battery Cell Voltage (VCELL1-VCELL4): These pins are used to monitor the voltage of each battery cell internally. The voltage of an individual cell can also be monitored externally at pin AO. The X3100 monitors 4 battery cells. The X3101 monitors 3 battery cells. For the X3101 device connect the VCELL4/VSS pin to ground. VCC RGP RGC RGO VCELL1 CB1 VCELL2 CB2 1 2 3 4 28 27 26 25 28 Lead TSSOP UVP/OCP OVP/LMON CS SCK VCELL3 CB3 VCELL4/VSS* CB4 5 6 7 8 24 23 22 21 X3100/ SO SI AS2 AS1 VSS VCS1 VCS2 OVT 9 10 11 12 20 19 18 17 AS0 AO UVT OCT 13 14 16 15 X3101 *For X3101, Connect to ground. Pin Symbol Description 1 VCELL1 Battery cell 1 voltage input 2 CB1 Cell balancing FET control output 1 3 VCELL2 Battery cell 2 voltage 4 CB2 Cell balancing FET control output 2 5 VCELL3 Battery cell 3 voltage 6 CB3 Cell balancing FET control output 3 7 VCELL4/ VSS Battery cell 4 voltage (X3100) Ground (X3101) 8 CB4 Cell balancing FET control output 4 9V SS Ground 10 VCS1 Current sense voltage pin 1 11 VCS2 Current sense voltage pin 2 12 OVT Over-charge detect/release time input 13 UVT Over-discharge detect/release time input 14 OCT Over-current detect/release time input 15 AO Analog multiplexer output 16 AS0 Analog output select pin 0 17 AS1 Analog output select pin 1 18 AS2 Analog output select pin 2 19 SI Serial data input 20 SO Serial data output 21 SCK Serial data clock input 22 CS Chip select input pin 23 OVP/ LMON Over-charge Voltage Protection output/ Load Monitor output 24 UVP/ OCP Over-discharge protection output/ Over-current protection output 25 RGO Voltage regulator output pin 26 RGC Voltage regulator control pin 27 RGP Voltage regulator protection pin 28 V CC Power supply |
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