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X3101 Datasheet(PDF) 21 Page - Xicor Inc. |
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X3101 Datasheet(HTML) 21 Page - Xicor Inc. |
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21 / 40 page ![]() X3100/X3101 – Preliminary Information Characteristics subject to change without notice. 21 of 40 REV 1.1.8 12/10/02 www.xicor.com of four input resistors to Op Amp OP1. The feedback resistors remain constant. This ratio of input to feedback resistors determines the gain. Putting external resistors in series with the inputs reduces the gain of the amplifier. VCS1 and VCS2 are read at AO with respect to a DC bias voltage of 2.5V. Therefore, the voltage range of VCS12 and VCS21 changes depending upon the direction of current flow (i.e. battery cells are in Charge or Discharge—Table 21). Table 26. AO Voltage Range for VCS12 and VCS21 By calculating the difference of VCS12 and VCS21 the offset voltage of the internal op-amp circuitry is cancelled. This allows for the accurate calculation of current flow into and out of the battery cells. Pack current is calculated using the following formula: VOLTAGE REGULATOR The X3100 and X3101 are able to supply peripheral devices with a regulated 5VDC±0.5% output at pin RGO. The voltage regulator should be configured externally as shown in Figure 10. The non-inverting input of OP1 is fed with a high precision 5VDC supply. The voltage at the output of the voltage regulator (VRGO) is compared to this 5V reference via the inverting input of OP1. The output of OP1 in turn drives the regulator pnp transistor (Q1). The negative feedback at the regulator output maintains the voltage at 5VDC±0.5% (including ripple) despite changes in load, and differences in regulator transistors. When power is applied to pin VCC of the X3100 or X3101, VRGO is regulated to 5VDC±10% for a nominal time of TOC+2ms. During this time period, VRGO is “tuned” to attain a final value of 5VDC±0.5% (Figure 2). The maximum current that can flow from the voltage regulator (ILMT) is controlled by the current limiting resistor (RLMT) connected between RGP and VCC. When the voltage across VCC and RGP reaches a nominal 2.5V (i.e. the threshold voltage for the FET), Q2 switches ON, shorting VCC to the base of Q1. Since the base voltage of Q1 is now higher than the emitter voltage, Q1 switches OFF, and hence the supply current goes to zero. Typical values for RLMT and ILMT are shown in Table 27. In order to protect the voltage regulator circuitry from damage in case of a short-circuit, RLMT ≥ 10Ω should always be used. Table 27. Typical Values for RLMT and ILMT When choosing the value of RLMT, the drive limitations of the PNP transistor used should also be taken into consideration. The transistor should have a gain of at least 100 to support an output current of 250mA. Figure 10. Voltage Regulator Operation 4KBIT EEPROM MEMORY The X3100 and X3101 contain a CMOS 4k-bit serial EEPROM, internally organized as 512 x 8 bits. This memory is accessible via the SPI port, and features the IDLock function. The 4kbit EEPROM array can be accessed by the SPI port at any time, even during a protection mode, except during sleep mode. After power is applied to VCC of the X3100 or X3101, EEREAD and EEWRITE Instructions AO Cell State AO Voltage Range VCS12 Charge 2.5V ≤ AO ≤ 5.0V VCS12 Discharge 0V ≤ AO ≤ 2.5V VCS21 Charge 0V ≤ AO ≤ 2.5V VCS21 Discharge 2.5V ≤ AO ≤ 5.0V Pack Current VCS 12 VCS 21 – () 2 () gain setting ()(current sense resistor) ---------------------------------------------------------------------------------------------------------- = RLMT Voltage Regulator Current Limit (ILMT) 10 Ω 250mA ± 50% (Typical) 25 Ω 100mA ± 50% (Typical) 50 Ω 50mA ± 50% (Typical) VCC RGC RGP RGO Voltage Reference _ + To Internal Voltage Regulating Circuitry Regulated 5VDC Output RLMT Q1 Un-Regulated Input Voltage ILMT Precision X3100/X3101 OP1 5VDC Q2 Tuning VRGO 0.1 µF |
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