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ZSSC3224 Datasheet(PDF) 21 Page - Integrated Device Technology |
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ZSSC3224 Datasheet(HTML) 21 Page - Integrated Device Technology |
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21 / 51 page ![]() ZSSC3224 Datasheet © 2016 Integrated Device Technology, Inc 21 October 24, 2016 3.4. Operational Modes Figure 3.2 illustrates the ZSSC3224 power-up sequence and subsequent operation depending on the selected interface communication mode (I 2C or SPI) as determined by interface-related first activities after power-up or reset. If the first command after power-up is a valid I²C command, the interface will function as an I²C interface until the next power-on reset (POR). If there is no valid I²C command, but an active signal at the SS pin is detected as the first valid activity, then the interface will respond as an SPI slave. With either interface, after the voltage regulators are switched on, the ZSSC3224 ’s low-voltage section (LV) is active while the related interface configuration information is read from memory. Then the LV section is switched off, the ZSSC3224 goes into Sleep Mode, and the interface is ready to receive commands. The interface is always powered by VDD, so it is referred to as the high voltage section (HV). See Table 3.1 for definitions of the commands. Figure 3.3 shows the ZSSC3224 operation in Normal Mode (with two operation principles: “Sleep” and “Cyclic”) and Command Mode, including when the LV and HV sections are active as indicated by the color legend. The Normal Mode automatically returns to Sleep Mode after executing the requested measurements, or periodically wakes up and conducts another measurement according to the setting for the sleep duration configured by CYC_period (bits[14:12] in memory register 02HEX). In Command Mode, the ZSSC3224 remains active if a dedicated command (e.g., Start_NOM) is sent, which is helpful during calibration. Command Mode can only be entered if Start_CM (command A9HEX; see Table 3.1) is the first command received after a POR. |
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