IP1202 datasheet(18/29 Pages) IRF

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iP1202

Control Loop Compensation

The iP1202 feedback control is based on single loop

voltage mode control principle if both outputs are

configured in dual output independent mode. In this

case, both outputs can have identical compensation.

If iP1202 outputs are configured for parallel opera-

tion, then compensation of the outputs will differ

slightly.

The goal in the design of the compensator is to

achieve the highest unity gain (0 db) crossover fre-

quency with sufficient phase margin for the closed

loop transfer function. The LC filter of the power sup-

ply introduces a double pole with 40db/dec slope

and 1800 phase lag. The 180° phase contribution from

the LC filter is the source of instabilty.

The resonant frequency of the LC filter is expressed

by equation (10):

(10)

The error amplifiers of the iP1202 PWM controller

are transconductance amplifiers, and their outputs

are available for external compensation.

Two type of compensators are studied in this sec-

tion. The first one is called Type II and it is used to

compensate systems the e.s.r. frequency f

esr (equa-

tion 8) of which is in the midfrequency range and Type

III that can be used for any type of output capacitors

and have a wide range of f

esr.

Fig. 18: Typical Type II compensation and its gain

plot

From Fig.18 the transfer function H(s) of the error

amplifier is given by (11):

(11)

The term s represents the frequency dependence of

the transfer function.

The Type II controller introduces a gain and a zero

expressed by equations (12) and (13):

)

(

(12)

where, g

m is the transconductance of the error am-

plifier.

(13)

Follow the steps below to determine the feedback

loop compensation component values:

1. Select a zero db crossover frequency f

0 in the range

of 10% to 20% of the switching frequency f

sw.

)

(

)

Magnitude(dB)

Frequency

H(s) dB

C10

E/A1

Vout1

FB1

VREF

CC1

iP1202

(Optional)

Type II

The inductor L

ois selected according to equation (9):

O = Vout x (1 - D) / (fsw x Iripple)

(9)

For output 1 of the above example, and for I

ripple of

30% of I

OUT1, LO1 is calculated to be 1.0µH.

The core must be selected according to the peak of

maximum output current.

A similar calculation can be applied to find an induc-

tor value for the second output.

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