August 2004

9

MIC2196

MIC2196

Micrel

low enough to operate at the minimum V

tee the boost converter will start up.

The maximum amout of MOSFET gate charge that can be

driven is limited by the power dissipation in the MIC2196. The

power dissipated by the gate drive circuitry is calculated

below:

P_gate_drive = Q_gate

× V

where:

Q_gate is the total gate charge of the external

MOSFET

The graph in Figure 4 shows the total gate charge which can

be driven by the MIC2196 over the input voltage range.

Higher gate charge will slow down the turn-on and turn-off

times of the MOSFET, which increases switching losses.

0

50

100

150

200

250

0246

8

10 12 14

INPUT VOLTAGE (V)

Max. Gate Charge

Figure 4. MIC2196 Frequency vs. Gate Charge

External Schottky Diode

In a boost converter topology, the boost diode, D1 must be

rated to handle the peak and average current. The average

current through the diode is equal to the average output

current of the boost converter. The peak current is calculated

in the current limit section of this specification.

For the MIC2196, Schottky diodes are recommended when

they can be used. They have a lower forward voltage drop

than ultra-fast rectifier diodes, which lowers power dissipa-

tion and improves efficiency. They also do not have a recov-

ery time mechanism, which results in less ringing and noise

when the diode turns off. If the output voltage of the circuit

prevents the use of a Schottky diode, then only ultra-fast

recovery diodes should be used. Slower diodes will dissipate

more power in both the MOSFET and the diode. The will also

cause excessive ringing and noise when the diode turns off.

Reference, Enable and UVLO Circuits

The output drivers are enabled when the following conditions

are satisfied:

• The V

undervoltage threshold.

• The voltage on the enable pin is greater than the

enable UVLO threshold.

The internal bias circuitry generates a 1.245V bandgap

reference for the voltage error amplifier and a 3V V

for the internal supply bus. The VDD pin must be decoupled

to ground with a 1

µF ceramic capacitor.

The enable pin (pin 3) has two threshold levels, allowing the

MIC2196 to shut down in a micro-current mode, or turn-off

output switching in standby mode. Below 0.9V, the device is

forced into a micro power shutdown. If the enable pin is

between 0.9V and 1.5V the output gate drive is disabled but

the internal circuitry is powered on and the soft start pin

voltage is forced low. There is typically 135mV of hysteresis

below the 1.5V threshold to insure the part does not oscillate

on and off due to ripple voltage on the input. Raising the

enable voltage above the UVLO threshold of 1.5V enables

the output drivers and allows the soft start capacitor to

charge. The enable pin may be pulled up to VINA.

Oscillator and Sync

The internal oscillator is self-contained and requires no

external components. The maximum duty cycle of the MIC2196

is 85%.

Minimum duty cycle becomes important in a boost converter

as the input voltage approaches the output voltage. At lower

duty cycles, the input voltage can be closer to the output

voltage without the output rising out of regulation. Minimum

duty cycle is typically 7%.

A frequency foldback mode is enabled if the voltage on the

feedback pin (pin 2) is less than 0.3V. In frequency foldback

the oscillator frequency is reduced by approximately a factor

of 4.

Voltage Setting Components

The MIC2196 requires two resistors to set the output voltage

as shown in Figure 5.

Pin

6

Voltage

Amplifier

1.245V

MIC2196

R1

R2

Figure 5. Voltage Setting Components

The output voltage is determined by the equation below.

VV

1

R1

R2

O

REF

=× +

Where: V

Lower values of resistance are preferred to prevent noise

from apprearing on the VFB pin. A typically recommended

value for R1 is 10K.

Decoupling Capacitor Selection

A 1

µF decoupling capacitor is used to stabilize the internal

regulator and minimize noise on the VDD pin. Placement of

this capacitor is critical to the proper operation of the MIC2196.

It must be next to the VDD and signal ground pins and routed

with wide etch. The capacitor should be a good quality

ceramic. Incorrect placement of the VDD decoupling capaci-

tor will cause jitter and/or oscillations in the switching wave-

form as well as variations in the overcurrent limit.