ADAQ7980 datasheet(13/49 Pages) AD

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Data Sheet

ADAQ7980/ADAQ7988

Rev. 0 | Page 13 of 49

ABSOLUTE MAXIMUM RATINGS

TA = 25°C, unless otherwise noted.

Table 7.

Parameter

Rating

V+ to V−

11 V

V+ to GND

−0.3 V to +11 V

V− to GND

−11 V to +0.3 V

VDD to GND

−0.3 V to +24 V

REF_OUT/VIO to GND

−0.3 V to +6 V

IN+/IN−/REF to GND

V− − 0.7 V to V+ + 0.7 V

AMP_OUT/ADCN to GND

−0.3 V to VREF + 0.3 V or

±130 mA

Differential Analog Input Voltage

(IN+ − IN−)

±1 V

Digital Input1 Voltage to GND

−0.3 V to VIO + 0.3 V

Digital Output2 Voltage to GND

−0.3 V to VIO + 0.3 V

Input Current to Any Pin Except Supplies3,4

±10 mA

Operating Temperature Range

−55°C to +125°C

Storage Temperature Range

−65°C to +150°C

Junction Temperature

150°C

ESD

Human Body Model (HBM)

4000 V

Field Induced Charged Device Model

(FICDM)

1250 V

The digital input pins include the following: CNV, SDI, and SCK.

The digital output pin is SDO.

Transient currents of up to 100 mA do not cause SCR latch-up.

Condition applies when power is provided to subsystem.

Stresses at or above those listed under Absolute Maximum Ratings

may cause permanent damage to the product. This is a stress

rating only; functional operation of the product at these or any

other conditions above those indicated in the operational section of

this specification is not implied. Operation beyond the maximum

operating conditions for extended periods may affect product

reliability.

THERMAL DATA

Absolute maximum ratings apply individually only, not in

combination. The ADAQ7980/ADAQ7988 can be damaged

when the junction temperature (TJ) limits are exceeded.

Monitoring ambient temperature does not guarantee that TJ is

within the specified temperature limits. In applications with

high power dissipation and poor thermal resistance, the

maximum ambient temperature (TA) may have to be derated.

In applications with moderate power dissipation and low printed

circuit board (PCB) thermal resistance, the maximum TA can

exceed the maximum limit as long as the junction temperature

is within specification limits. The θJA of the package is based on

modeling and calculation using a 4-layer board. The θJA is highly

dependent on the application and board layout. In applications

where high maximum power dissipation exists, close attention

to thermal board design is required. The θJA value may vary

depending on PCB material, layout, and environmental conditions.

THERMAL RESISTANCE

Thermal resistance values specified in Table 8 were calculated

based on JEDEC specifications and must be used in compliance

with JESD51-12. Because the product contains more than one

silicon device, only the worst case junction temperature is reported.

Table 8. Thermal Resistance

Package Type1, 2

θJA

θJCTOP2

ΨJT

Unit

CC-24-2

103

12.6

˚C/W

These values represent the worst case die junction in the package.

Table 8 values were calculated based on the standard JEDEC test conditions

defined in Table 9, unless otherwise specified.

For θJC test, 100 µm thermal interface material (TIM) was used. TIM is

assumed to be 3.6 W/mK.

Only use θJA and θJC TOP to compare thermal performance of the

package of the device with other semiconductor packages when

all test conditions listed are similar. One common mistake is to

use θJA and θJC to estimate the junction temperature in the system

environment. Instead, using ΨJT is a more appropriate way to

estimate the worst case junction temperature of the device in the

system environment. First, take an accurate thermal measurement

of the top center of the device (on the mold compound in this

case) while the device operates in the system environment. This

measurement is known in the following equation as TTOP. This

equation can then be used to solve for the worst case TJ in that

given environment as follows:

TJ = ΨJT × P + TTOP

where:

ΨJT is the junction to top thermal characterization number as

specified in data sheet.

P refers to total power dissipation in the chip (W).

TTOP refers to the package top temperature (°C) and is measured

at the top center of the package in the environment of the user.

ESD CAUTION

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