FEDL9484-01

ML9484

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POWER ON/OFF TIMING

To turn on the power supply, raise the logic power supply first, then LCD drive power supply in order to prevent

the IC from malfunctioning.

To fall the power supply, fall the LCD drive power supply first, then the logic power supply.

For a VDD pin ranging from 0 V to VDDmin, set VDD ≥ VLCD and t1 ≥ 0 [ns].

INITIALIZATION SIGNAL TIMING

Keep the RESETB pin at "L" level until the VDD reaches VDD min.

(t2 ≥ 200[ns])

The value of the current of the pull-up resistor is specified for RESETB pin.

The customer needs to select an external capacitor that meets the timing requirements shown above.

Time

Voltage

t1

t1

VDD

RESETB

VIL

t2

VDD min