ML9484 datasheet(9/29 Pages) LAPIS

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FEDL9484-01

ML9484

9/29

PIN DESCRIPTIONS

Pad

number

Symbol

I/O

Description

1 to 50

SEG1 to

SEG50

Outputs for LCD display. Connected to the segment pins on the LCD panel.

In the display off mode, all the outputs are fixed to GND.

51 to 54

COM1 to

COM4

Outputs for LCD display. Connected to the common pins on the LCD panel.

In the display off mode, all the outputs are fixed to GND.

VLCD

Power supply pin for LCD driver.

VDD

Power supply pin for logic circuit.

OSC I/E

This input selects whether to use the external clock input mode or to use the

Internal oscillation mode. It has a schmitt circuit.

When this pin is "H", the mode is the Internal Rf oscillation mode.

When this pin is "L", the mode is the external clock input mode.

TEST

IC test pin. Has a pull-down resistor built-in.

Use it as it is connected to GND.

GND

Ground pin.

OSC

Pin for oscillation. Has a Schmitt circuit built-in.

Internal Rf oscillation mode: Set the OSCI/E pin to "H", open the OSC pin.

External clock input mode: Set the OSCI/E pin to "L", input the external clock

to the OSC pin.

RESETB

Reset signal input pin for initializing inside the IC. It has a schmitt circuit.

The "L" level enables the reset. This pin has an Internal pull-up resistor.

The power-on reset operation is available by connecting an external

capacitor.

LOAD

Input pin for the load signal of display data.

It has a schmitt circuit.

The display data in the shift register is transmitted as is to the segment driver

for the "H" duration. When this pin is brought into "L", the shift register is

disconnected from the segment driver. The display data in the shift register

immediately before it become "L" is held in the data latch and transmitted to

the segment driver.

CLOCK

Shift clock input pin for display data. It has a schmitt circuit.

The display data input to the DATA pin is serially input to the shift register at

the CLOCK signal rise.

DATA

Display data input pin. It has a schmitt circuit.

Input the display data in the order of SEG50, SEG49, ... , SEG2, and SEG1.

The display data turns on at "H" and turns off at "L".

*1: Reset circuit configuration

RESETB

VDD

CRST

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