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S2-LP Datasheet(PDF) 66 Page - STMicroelectronics

Part # S2-LP
Description  Excellent receiver selectivity and blocking
PDF  90 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

S2-LP Datasheet(HTML) 66 Page - STMicroelectronics

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S2-LP
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DocID029944 Rev 1
Figure 15: LDC in TX with auto-ack
On each wake-up slot, the S2-LP will enter in TX only if the TX-FIFO is not empty,
otherwise the TX slot will be skipped with the device remaining in SLEEP.
In this case, the TX-FIFO must be retained during the SLEEP state, thus, the SLEEP_B
must be selected setting the SLEEP_MODE_SEL bit to 1.
In case of RX the device will enter in RX and wait for a packet, if it is received, an ack will
be immediately transmitted back.
Figure 16: LDC in RX with auto-ack
8.2.2
Sniff mode
The sniff timer can be enabled, setting the register FAST_CS_TERM_EN, allowing sensing
operation during periodic reception cycles. In this way, the receiver will stays in RX for a
time defined by the sniff timer (very short time). Once a valid carrier sense event is
detected (carrier sense above a programmable RSSI threshold) the RX timer is enabled.
Typical scenario is an asynchronous
low duty cycle mode where the receiver has to “sniff”
the carrier (the preamble sequence) and in case receive the packet. The sniff timer allows
a very low duty cycle enabling an ultra-low power receive mode. The sniff timer frequency
can be calculated according the following equation.
Equation - Sniff timer equation
������������������������ =
����������������
24
∙ 2��������������������_����
This frequency is higher with a higher value of the channel filter exponent. The rationale
behind this is that the RSSI settling time is as lower as higher is the channel filter
bandwidth.
The expiration value of the sniff timer is programmed though the RSSI_SETTLING_LIMIT
register. The timer is expected to be programmed to expire before PQI/SQI detection.
When the sniff timer is enabled, the main controlled monitors the settling of the RSSI. Once
this is valid, the main controller checks for the CS valid signal:



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