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SC16C752B Datasheet(PDF) 15 Page - NXP Semiconductors |
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SC16C752B Datasheet(HTML) 15 Page - NXP Semiconductors |
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15 / 47 page ![]() Philips Semiconductors SC16C752B 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs Product data Rev. 03 — 14 December 2004 15 of 47 9397 750 14443 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 6.6 DMA operation There are two modes of DMA operation, DMA mode 0 or DMA mode 1, selected by FCR[3]. In DMA mode 0 or FIFO disable (FCR[0] = 0) DMA occurs in single character transfers. In DMA mode 1, multi-character (or block) DMA transfers are managed to relieve the processor for longer periods of time. 6.6.1 Single DMA transfers (DMA mode 0/FIFO disable) Figure 10 shows TXRDY and RXRDY in DMA mode 0/FIFO disable. Transmitter: When empty, the TXRDY signal becomes active. TXRDY will go inactive after one character has been loaded into it. Receiver: RXRDY is active when there is at least one character in the FIFO. It becomes inactive when the receiver is empty. Fig 10. TXRDY and RXRDY in DMA mode 0/FIFO disable. TX wrptr wrptr FIFO EMPTY TXRDY RX rdptr rdptr FIFO EMPTY RXRDY RXRDY 002aaa232 at least one location filled at least one location filled TXRDY |
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