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ST72561J4-Auto Datasheet(PDF) 21 Page - STMicroelectronics |
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ST72561J4-Auto Datasheet(HTML) 21 Page - STMicroelectronics |
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21 / 324 page ![]() ST72561-Auto Description Doc ID 12370 Rev 8 21/324 Figure 1. Device block diagram 1. On some devices only (see Table 2: Product overview) 8-BIT CORE ALU OSC1 OSC2 RESET PORT A CONTROL RAM PA7:0 (8 bits)1 PROGRAM (16 - 60 Kbytes) MEMORY PLL x 2 PWM 8-Bit PORT B PORT C SPI LINSCI2 PB7:0 (8 bits)1 PC7:0 (8 bits)1 OSC PORT D PD7:0 (8 bits)1 /2 option LINSCI1 16-Bit TIMER (LIN master) (LIN master/slave) VSS VDD POWER SUPPLY PORT E PE7:0 (8 bits)1 PORT F PF7:0 (8 bits)1 TIMER ART MCC (Clock Control) TLI1 WATCHDOG WINDOW CAN (2.0B ACTIVE) (1 - 2 Kbytes) |
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