STM8S003F3 datasheet(28/104 Pages) STMICROELECTRONICS

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Pinouts and pin descriptions

STM8S003F3 STM8S003K3

28/104

DocID018576 Rev 9

PC4/ CLK_CCO/

TIM1_

CH4/AIN2/

[TIM1_ CH2N]

I/O

Port C4

Configurable

clock

output/Timer

1 - channel

4/Analog

input 2

Timer 1 -

inverted

channel 2

[AFR7]

PC5/ SPI_SCK

[TIM2_ CH1]

I/O

Port C5 SPI clock

Timer 2 -

channel 1

[AFR0]

PC6/ SPI_MOSI

[TIM1_ CH1]

I/O

Port C6

SPI master

out/slave in

Timer 1 -

channel 1

[AFR0]

PC7/ SPI_MISO

[TIM1_ CH2]

I/O

Port C7

SPI master

in/ slave out

Timer 1 -

channel 2

[AFR0]

15 PD1/ SWIM(4)

I/O

Port D1

SWIM data

interface

PD2/AIN3/

[TIM2_ CH3]

I/O

Port D2

Analog input

Timer 2 -

channel 3

[AFR1]

PD3/ AIN4/

TIM2_ CH2/

ADC_ ETR

I/O

Port D3

Analog input

4/ Timer 2 -

channel

2/ADC

external

trigger

1. I/O pins used simultaneously for high current source/sink must be uniformly spaced around the package. In addition, the

total driven current must respect the absolute maximum ratings.

2. When the MCU is in halt/active-halt mode, PA1 is automatically configured in input weak pull-up and cannot be used for

waking up the device. In this mode, the output state of PA1 is not driven. It is recommended d to use PA1 only in input mode

if halt/active-halt is used in the application.

3. In the open-drain output column, "T" defines a true open-drain I/O (P-buffer, weak pull-up, and protection diode to VDD are

not implemented).

4. The PD1 pin is in input pull-up during the reset phase and after internal reset release.

Table 6. STM8S003F3 pin description (continued)

no.

Pin name

Type

Input

Output

Main

function

(after

reset)

Default

alternate

function

Alternate

function

after remap

[option bit]

High

sink(1)

OD PP

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