DUAL LVCMOS / LVTTL-TO-DIFFERENTIAL

LVHSTL TRANSLATOR

85222 DATA SHEET

4

REVISION C 5/7/15

A

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

f

MAX

Output Frequency

350

MHz

t

PD

Propagation Delay; NOTE 1

ƒ

≤ 350MHz

750

950

1150

ps

tsk(pp)

Part-to-Part Skew; NOTE 2, 3

350

ps

t

R

Output Rise Time

20% to 80%

150

800

ps

t

F

Output Fall Time

20% to 80%

150

800

ps

odc

Output Duty Cycle

ƒ

≤ 150MHz

48

52

%

150 < ƒ

≤ 250MHz

47

53

%

250 < ƒ

≤ 350MHz

45

55

%

NOTE 1: Measured from V

NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages

and with equal load conditions. Using the same type of inputs on each device, the outputs are measured

at the differential cross points.

NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.

A

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

f

MAX

Output Frequency

350

MHz

t

PD

Propagation Delay; NOTE 1

ƒ

≤ 350MHz

850

1075

1300

ps

tsk(pp)

Part-to-Part Skew; NOTE 2, 3

450

ps

t

R

Output Rise Time

20% to 80%

150

800

ps

t

F

Output Fall Time

20% to 80%

150

800

ps

odc

Output Duty Cycle

ƒ

≤ 150MHz

45

55

%

150 < ƒ

≤ 350MHz

40

60

%

NOTE 1: Measured from V

NOTE 2: Defined as skew between outputs on different devices operating at the same supply voltages

and with equal load conditions. Using the same type of inputs on each device, the outputs are measured

at the differential cross points.

NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.