HT66F007 datasheet(15/131 Pages) HOLTEK

15 / 131 page

Rev. 1.41

April 11, 2017

Rev. 1.41

April 11, 2017

HT66F007/HT66F008

Cost-Effective A/D Flash MCU with EEPROM

HT66F007/HT66F008

Cost-Effective A/D Flash MCU with EEPROM

Ti me

V DD

V PO R

RR VD D

t PO R

System Architecture

Akeyfactorinthehigh-performancefeaturesoftheHoltekrangeofmicrocontrollersisattributed

totheirinternalsystemarchitecture.Thedevicestakeadvantageoftheusualfeaturesfoundwithin

RISCmicrocontrollersprovidingincreasedspeedofoperationandPeriodicperformance.The

pipeliningschemeisimplementedinsuchawaythatinstructionfetchingandinstructionexecution

areoverlapped,henceinstructionsareeffectivelyexecutedinonecycle,withtheexceptionofbranch

orcallinstructions.An8-bitwideALUisusedinpracticallyallinstructionsetoperations,which

carriesoutarithmeticoperations,logicoperations,rotation,increment,decrement,branchdecisions,

etc.TheinternaldatapathissimplifiedbymovingdatathroughtheAccumulatorandtheALU.

CertaininternalregistersareimplementedintheDataMemoryandcanbedirectlyorindirectly

addressed.Thesimpleaddressingmethodsoftheseregistersalongwithadditionalarchitectural

featuresensurethataminimumofexternalcomponentsisrequiredtoprovideafunctionalI/Oand

A/Dcontrolsystemwithmaximumreliabilityandflexibility.Thismakesthedevicessuitablefor

low-cost,high-volumeproductionforcontrollerapplications.

Clocking and Pipelining

Themainsystemclock,derivedfromeitheraHXT,HIRCorLIRCoscillatorissubdividedinto

fourinternallygeneratednon-overlappingclocks,T1~T4.TheProgramCounterisincrementedat

thebeginningoftheT1clockduringwhichtimeanewinstructionisfetched.TheremainingT2~T4

clockscarryoutthedecodingandexecutionfunctions.Inthisway,oneT1~T4clockcycleforms

oneinstructioncycle.Althoughthefetchingandexecutionofinstructionstakesplaceinconsecutive

instructioncycles,thepipeliningstructureofthemicrocontrollerensuresthatinstructionsare

effectivelyexecutedinoneinstructioncycle.Theexceptiontothisareinstructionswherethe

contentsoftheProgramCounterarechanged,suchassubroutinecallsorjumps,inwhichcasethe

instructionwilltakeonemoreinstructioncycletoexecute.

Fe tc h In st . ( PC )

Ex ec ut e In st . (P C- 1)

Fe tc h In st . (P C+ 1)

Ex ec ut e In st . (P C)

Fe tc h In st . (P C+ 2)

Ex ec ut e In st . (P C+ 1)

PC +1

PC +2

f SY S

(S yst em C lo ck)

P has e Cl o ck T1

Pr ogr am C oun te r

P has e Cl o ck T2

P has e Cl o ck T3

P has e Cl o ck T4

Pi pe lin in g

System Clock and Pipelining

HT66F007 Datasheet(PDF) 15 Page - Holtek Semiconductor Inc

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