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HT82V70 Datasheet(PDF) 49 Page - Holtek Semiconductor Inc

Part # HT82V70
Description  Two 6-Channel, up to 240MSPS CIS Timing Generator and Shading Correction
PDF  71 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT82V70 Datasheet(HTML) 49 Page - Holtek Semiconductor Inc

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Rev. 1.00
49
January 12, 2017
HT82V70
• Address P5_10h: CIS1 Blue LAMP On LSB Register
Bit
Mode
Description
Default
7-0
R/W
LAMPB On Time Least Significant Bits
This selects the pixel count at which the LAMPB output goes high.
Note: Real CIS1 Lampb on position = Lampb on register × 4.
2Eh
• Address P5_11h: CIS1 Blue LAMP Off MSB Register
Bit
Mode
Description
Default
7-4
—
Reserved
—
3-0
R/W
LAMPB Off Time Most Significant Byte
This selects the pixel count at which the LAMPB output goes low.
1h
• Address P5_12h: CIS1 Blue LAMP Off LSB Register
Bit
Mode
Description
Default
7-0
R/W
LAMPB Off Time Least Significant Bits
This selects the pixel count at which the LAMPB output goes low.
Note: Real CIS1 Lampb off position = Lampb off register × 4..
06h
• Address P5_13h: CIS1 IR1 LAMP On MSB Register
Bit
Mode
Description
Default
7-4
—
Reserved
—
3-0
R/W
LAMPIR1 On Time Most Significant Byte
This selects the pixel count at which the LAMPIR output goes high.
0h
• Address P5_14h: CIS1 IR1 LAMP On LSB Register
Bit
Mode
Description
Default
7-0
R/W
LAMPIR1 On Time Least Significant Bits
This selects the pixel count at which the LAMPIR output goes high.
Note: Real CIS1 Lampir1 on position = Lampir1 on register × 4.
2Eh
• Address P5_15h: CIS1 IR1 LAMP Off MSB Register
Bit
Mode
Description
Default
7-4
—
Reserved
—
3-0
R/W
LAMPIR1 Off Time Most Significant Byte
This selects the pixel count at which the LAMPIR output goes low.
1h
• Address P5_16h: CIS1 IR1 LAMP Off LSB Register
Bit
Mode
Description
Default
7-0
R/W
LAMPIR1 Off Time Least Significant Bits
This selects the pixel count at which the LAMPIR output goes low.
Note: Real CIS1 Lampir1 off position = Lampir1 off register × 4.
06h
• Address P5_17h: CIS1 IR2 LAMP On MSB Register
Bit
Mode
Description
Default
7-4
—
Reserved
—
3-0
R/W
LAMPIR2 On Time Most Significant Byte
This selects the pixel count at which the LAMPIR output goes high.
0h
• Address P5_18h: CIS1 IR2 LAMP On LSB Register
Bit
Mode
Description
Default
7-0
R/W
LAMPIR2 On Time Least Significant Bits
This selects the pixel count at which the LAMPIR output goes high.
Note: Real CIS1 Lampir2 on position = Lampir2 on register × 4.
2Eh



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