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37C672 Datasheet(PDF) 39 Page - SMSC Corporation |
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37C672 Datasheet(HTML) 39 Page - SMSC Corporation |
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39 / 173 page ![]() Enhanced Super I/O Controller with Fast IR Datasheet SMSC FDC37C672 Page 39 Rev. 10-29-03 PRELIMINARY DATASHEET transfer request signal of up to the time taken for the FDC to read the last 16 bytes from the FIFO. The host must tolerate this delay. 6.5.4 Result Phase The generation of FINT determines the beginning of the result phase. For each of the commands, a defined set of result bytes has to be read from the FDC before the result phase is complete. These bytes of data must be read out for another command to start. RQM and DIO must both equal "1" before the result bytes may be read. After all the result bytes have been read, the RQM and DIO bits switch to "1" and "0" respectively, and the CB bit is cleared, indicating that the FDC is ready to accept the next command. |
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