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CS4399 Datasheet(PDF) 45 Page - Cirrus Logic |
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CS4399 Datasheet(HTML) 45 Page - Cirrus Logic |
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45 / 111 page  DS1113F1 45 CS4399 4.12 Control Port Operation Fig. 4-28 shows sticky-bit behavior. Figure 4-28. Example of Rising-Edge-Sensitive, Sticky, Interrupt-Status-Bit Behavior 4.12 Control Port Operation The control port is used to access control registers and on-chip memory locations, allowing the device to be configured for desired operational modes and formats. Control port operation may be completely asynchronous with respect to the audio sample rates. However, to avoid potential interference problems, control port pins must remain static if no operation is required. The control port operates using a I2C interface with the CS4399 acting as a slave device. Device communication must not begin until tPUD (refer to Table 3-17) after power conditions are ready and RESET is released. 4.12.1 I2C Control Port Operation The I2C control port operates completely asynchronously with the audio sample rates. However, to avoid interference problems, the I2C control-port pins must remain static if no operation is required. Table 4-11. Interrupts Events and Register Bit Fields Interrupt Register Bit Field Interrupt Mask Field DAC overflow DAC_OVFL_INT DAC_OVFL_INT_MASK HP unplug detect HPDETECT_UNPLUG_INT HPDETECT_UNPLUG_INT_MASK HP plug detect HPDETECT_PLUG_INT HPDETECT_PLUG_INT_MASK XTAL is ready XTAL_READY_INT XTAL_READY_INT_MASK XTAL error detected XTAL_ERROR_INT XTAL_ERROR_INT_MASK ASP overload ASP_OVLD_INT ASP_OVLD_INT_MASK ASP error ASP_ERR_INT ASP_ERR_INT_MASK ASP late ASP_LATE_INT ASP_LATE_INT_MASK ASP early ASP_EARLY_INT ASP_EARLY_INT_MASK ASP no LRCK ASP_NOLRCK_INT ASP_NOLRCK_INT_MASK XSP overload XSP_OVLD_INT XSP_OVLD_INT_MASK XSP error XSP_ERR_INT XSP_ERR_INT_MASK XSP late XSP_LATE_INT XSP_LATE_INT_MASK XSP early XSP_EARLY_INT XSP_EARLY_INT_MASK XSP no LRCK XSP_NOLRCK_INT XSP_NOLRCK_INT_MASK PLL is ready PLL_READY_INT PLL_READY_INT_MASK PLL error detected PLL_ERROR_INT PLL_ERROR_INT_MASK Power down done PDN_DONE_INT PDN_DONE_INT_MASK DSD stuck Error DSD_STUCK_INT DSD_STUCK_INT_MASK DSD channel A invalid error DSD_INVAL_A_INT DSD_INVAL_A_INT_MASK DSD channel B invalid error DSD_INVAL_B_INT DSD_INVAL_B_INT_MASK DSD channel A silence pattern detected DSD_SILENCE_A_INT DSD_SILENCE_A_INT_MASK DSD channel B silence pattern detected DSD_SILENCE_B_INT DSD_SILENCE_B_INT_MASK DSD rate error detected DSD_RATE_INT DSD_RATE_INT_MASK DoP marker detected DOP_MRK_DET_INT DOP_MRK_DET_INT_MASK DoP engine on DOP_ON_INT DOP_ON_INT_MASK Raw signal feeding status register bit Status register bit ___ INT Register read signal Status read value Read Source 0 11 0 00 1 Poll cycle Interrupt service Extra read for present state Interrupt service Extra read for present state Poll cycle Poll cycle |
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