WM8234 datasheet(67/144 Pages) CIRRUS

67 / 144 page

WM8234

Rev 4.6

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

(related PGA and digits goes power down)

0 = normal operation

1 = power down

PDMD

power down mode

0 : standby

1 : sleep

power down

0 : normal operation

1 : power down

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R4 (04h)

Setup Reg 2

VRLC_TOP_SE

selects output range of VRLCDAC

0 = AVDD

1 = 1.6V

PGAFS

control PGA input polarity

0 = negative

1 = positive

ADCFS

control ADC full scale range

0 = 1.2V

1 = 1.8V

CLPMD

select clamp mode

0 = line clamp

1 = bit clamp

CDS

CDS mode control

0 = S/H mode

1 = CDS mode

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

REFER TO

R5 (05h)

Setup Reg 3

SF_BYPLS

bypass level shift of VRLC source follower

0 = use level shifter

1 = bypass level shifter

3:2

PT_SF[1:0]

source follower power trim

00 = 1mA

01 = 2mA

10 = 3mA

11 = 4mA

SF_INP

control source follower on signal inputs IN*

0 = disabled

1 = enabled

SF_VRLC

control source follower on VRLC

0 = disabled

1 = enabled

WM8234 Datasheet(PDF) 67 Page - Cirrus Logic

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