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WM8234 Datasheet(PDF) 83 Page - Cirrus Logic |
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WM8234 Datasheet(HTML) 83 Page - Cirrus Logic |
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83 / 144 page ![]() WM8234 Rev 4.6 83 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO 1 = frame sequence mode 6 FA_EVERYLINE 0 control fine adjustment 0 = Fine adjust only used on the 1st line of a frame 1 = Fine adjust used on every line of a frame 5 FA_ACCUM 0 makes the fine adjust calibration accumulate a result over multiple lines 0 = not accumulate 1 = accumulate 4 FA_EN 0 enables the fine adjust operation 0 = disable 1 = enable 3 CA_EVERYLINE 0 control coarse ajustment 0 = Coarse adjust only used on the 1st line of a frame 1 = Coarse adjust used on every line of a frame 2:0 CADUR[2:0] 000 controls the number of coarse adjust iterations to be perfomed 000 = disable 001 = 1time 010 = 2time 011 = 3time … 111 = 7time Register 51h BLC control 1 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R82 (52h) BLC control 2 1 SEQ_START 0 register flag to indicate that the next start-of-line indicator is the first line of the first frame in a frame-sequence. This register is automatically set to zero at the end of the BLC operation on the first line 0 = no effect 1 = first frame of frame-sequence mode 0 FRAME_START 0 Register flag to indicate that the next start-of-line indicator is the first line in a frame. This register is automatically set to zero at the end of the BLC operation on the first line 0 = no effect 1 = start of line Register 52h BLC control 2 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R83 (53h) BLC control 3 7:0 BPIX_AVAIL[7:0 ] 0000_0000 LSBs of the number of black-pixels available over which to perform the coarse and/or fine adjust calibration 00_0000_0000 = no pixel available 11_1111_1111 = 1023 pixels Register 53h BLC control 3 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION REFER TO R84 (54h) 1:0 BPIX_AVAIL[9:8 00 MSBs of the number of black-pixels available over which to |
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