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WM8805 Datasheet(PDF) 8 Page - Cirrus Logic

Part # WM8805
Description  8:1 Digital Interface Transceiver with PLL
PDF  66 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8805 Datasheet(HTML) 8 Page - Cirrus Logic

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WM8805
Production Data
w
PD, Rev 4.5, March 2009
8
DIGITAL AUDIO INTERFACE – SLAVE MODE
BCLK
LRCLK
t
BCH
t
BCL
t
BCY
DIN
DOUT
t
LRSU
t
DS
t
LRH
t
DH
t
DD
Figure 3 Digital Audio Data Timing – Slave Mode
Test Conditions
PVDD = 3.3V, DVDD = 3.3V, PGND = 0V, DGND = 0V, TA = +25
oC, fs = 48kHz, MCLK = 256fs unless stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Audio Data Input Timing Information
BCLK cycle time
tBCY
50
ns
BCLK pulse width high
tBCH
20
ns
BCLK pulse width low
tBCL
20
ns
LRCLK set-up time to BCLK
rising edge
tLRSU
10
ns
LRCLK hold time from
BCLK rising edge
tLRH
10
ns
DIN set-up time to BCLK
rising edge
tDS
10
ns
DIN hold time from BCLK
rising edge
tDH
10
ns
DOUT propagation delay
from BCLK falling edge
tDD
0
10
ns
Table 3 Digital Audio Data Timing – Slave Mode



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