DS4302 datasheet(3/8 Pages) MAXIM

3 / 8 page

2-Wire, 5-Bit DAC with Three Digital Outputs

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PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

SCL Clock Frequency

fSCL

400

kHz

Bus Free Time Between STOP

and START Conditions

tBUF

1.3

µs

Low Period of SCL

tLOW

1.3

µs

High Period of SCL

tHIGH

0.6

µs

Data Hold Time

tHD:DAT

0.9

µs

Data Setup Time

tSU:DAT

100

Start Setup Time

tSU:STA

0.6

µs

SDA and SCL Rise Time

(Note 5)

20 + 0.1CB

300

SDA and SCL Fall Time

(Note 5)

20 + 0.1CB

300

Stop Setup Time

tSU:STO

0.6

µs

SDA and SCL Capacitive

(Note 5)

400

AC ELECTRICAL CHARACTERISTICS (Figure 3)

(VCC = +4.5V to 5.5V, TA = -40°C to +85°C, timing referenced to VIL(MAX) and VIH(MIN).)

Note 1: All voltages referenced to ground.

Note 2: ISTBY specified for the inactive state measured with SDA = SCL = VCC and with VOUT, P0, P1, and P2 floating.

Note 3: No load on VOUT.

Note 4: The DS4302 will not obstruct the SDA and SCL lines if VCC is switched off as long as the voltages applied to these inputs

does not violate their min and max input-voltage levels.

Note 5: CB—total capacitance of one bus line in picofarads.

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