DAC38RF82IAAV datasheet(29/140 Pages) TI1

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DAC38RF82, DAC38RF89

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SLASEA6B – FEBRUARY 2017 – REVISED AUGUST 2017

Product Folder Links: DAC38RF82 DAC38RF89

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Table 6. Receiver Equalization Configuration (continued)

EFFECT

[2]

Default

Boost. Equalizer gain boosted by 6 dB, with a 20% reduction in bandwidth, and an increase of

5mW power consumption. May improve performance over long links.

Table 7. Receiver Equalizer Hold

EQHOLD

EFFECT

Equalizer adaption enabled. The equalizer adaption and analysis algorithm is enabled. This should be the default

state.

Equalizer adaption held. The equalizer is held in its current state. Additionally, the adaption and analysis algorithm

is reset.

Table 8. Relationship Between Lane Rate and SerDes PLL Output Frequency

EQBOOST

GAIN BOOST (dB)

BANDWIDTH CHANGE (%)

POWER INCREASE (mW)

-30

-20

When EQ is set to 010 or 011, the equalizer is reconfigured to provide analytical data about the amount of pre

and post cursor equalization respectively present in the received signal. This can in turn be used to adjust the

equalization settings of the transmitting link partner, where a suitable mechanism for communicating this data

back to the transmitter exists. Status information is provided by setting field DTEST in register DTEST (8.5.76) to

“0111” for EQOVER and “0110” for EQUNDER. The procedure is as follows:

1. Enable the equalizer by setting fields EQHLD low and EQ to “001” (register SRDS_CFG1 8.5.86). Allow

sufficient time for the equalizer to adapt;

2. Set EQHLD to 1 to lock the equalizer and reset the adaption algorithm. This also causes both EQOVER and

EQUNDER to become low;

3. Wait at least 48 UI, and proportionately longer if the CDR activity is less than 100%, to ensure the 1 on

EQHLD is sampled and acted upon;

4. Set EQ to “010” or “011”, and EQHLD to 0. The equalization characteristics of the received signal are

analysed (the equalizer response will continue to be locked);

5. Wait at least 150×103 UI to allow time for the analysis to occur, proportionately longer if the CDR activity is

less than 100%;

6. Examine EQOVER and EQUNDER for results of analysis

–

If EQOVER is high, it indicates the signal is over equalized;

–

If EQUNDER is high, it indicates the signal is under equalized;

7. Set EQHLD to 1;

8. Repeat items 3–7 if required;

9. Set EQ to “001”, and EQHLD to 0 to exit analysis mode and return to normal adaptive equalization.

NOTE

When changing EQ from one non-zero value to another, EQHLD must already be 1. If this

is not the case, there is a chance the equalizer could be reset by a transitory input state

(i.e., if EQ is momentarily 000). EQHLD can be set to 0 at the same time as EQ is

changed.

As the equalizer adaption algorithm is designed to equalize the post cursor, EQOVER or

EQUNDER will only be set during post cursor analysis if the amount of post cursor

equalization required is more or less than the adaptive equalizer can provide.

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