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SM5950AM Datasheet(PDF) 10 Page - Nippon Precision Circuits Inc |
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SM5950AM Datasheet(HTML) 10 Page - Nippon Precision Circuits Inc |
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10 / 20 page ![]() SM5950AM NIPPON PRECISION CIRCUITS INC.—10 FUNCTIONAL DESCRIPTION Input Interface Settings (IMOD0, IMOD1, IISI) Input data format 2s-complement, MSB-first, L/R alternating serial data Note: L = Low input level, H = high input level Input timing The input timing for each input format is shown in figures 4 to 8. Output System Clock (SCKO) A clock with frequency 512 times the output sampling frequency (fso) must be input on SCKO. In master mode, the LRCO and BCKO output clocks are derived from the input clock on SCKO. It also functions as the internal computation circuit system clock. Output Interface Settings (OMOD0, OMOD1, IISO, THROU, SLAVE) Output data format 2s-complement, MSB-first, L/R alternating serial Note: L = Low input level, H = high input level Output mode select Output timing The timing for each output format is shown in figures 9 to 13. In slave mode, the input timing of LRCO and BCKO for each output format is shown in figures 9 to 13. In through mode, the LRCI, BCKI, and DI inputs are fed through to the outputs regardless of the output data format settings. IMOD0 IMOD1 IISI Format L L L 16-bit MSB-first right-justified H L L 20-bit MSB-first right-justified L H L 24-bit MSB-first right-justified H H L MSB-first left-justified (leading 16 bits valid data) H or L H or L H IIS (leading 16 bits valid data) OMOD0 OMOD1 IISO Format L L L 16-bit MSB-first right-justified H L L 20-bit MSB-first right-justified L H L 24-bit MSB-first right-justified H H L MSB-first left-justified (16-bit output) H or L H or L H IIS (16-bit output) Pin setting Function THROU SLAVE Mode Description LRCO, BCKO L L Master LRCO and BCKO are derived form SCKO. Function as outputs H Slave LRCO and BCKO are supplied externally. Function as inputs H H or L Through LRCO, BCKO, and DOUT are connected directly to LRCI, BCKI, and DI inputs. Note: DMUTE is valid. Function as outputs |
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