SM5950AM datasheet(15/20 Pages) NPC

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SM5950AM

NIPPON PRECISION CIRCUITS INC.—15

Group Delay Time

If tINPUT and tOUTPUT are deﬁned as:

tINPUT

: Serial input data (fsi rate) read end timing (LRCI clock rising edge)

tOUTPUT : Serial output data (fso rate) output start timing (LRCO clock rising edge)

the group delay is given by:

tOUTPUT – tINPUT = (48.41 ± 8.41)/fsi

Response Time

The conversion rate detector stage requires a certain amount of time to calculate the sample rate conversion

ratio with accuracy. The minimum response time, after the SM5950AM input sampling frequency (fsi: LRCI

input) and output sampling frequency (fso: derived from SCKO) have stabilized sufﬁciently, is the time

required to determine the sample rate conversion ratio to 16-bit accuracy after reset is cleared, and is given by:

Response time = 16384/fso (371ms at fso = 44.1kHz)

t OUTPUT

(48.41

± 8.41)/fsi

Serial data input

1/fs

tINPUT

1/fso

Serial data output

t OUTPUT

INPUT

– t

t OUTPUT

tINPUT

Data waveform image

SM5950AM Datasheet(PDF) 15 Page - Nippon Precision Circuits Inc