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S89430 Datasheet(PDF) 11 Page - Seiko Instruments Inc |
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S89430 Datasheet(HTML) 11 Page - Seiko Instruments Inc |
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11 / 33 page ![]() MINI ANALOG SERIES 0.5 μA Rail-to-Rail CMOS OPERATIONAL AMPLIFIER Rev.2.1_01 S-89430/89431 Series 11 Test Circuit (Per Circuit) 1. Power supply voltage rejection ratio RF RS RS RF + − VOUT VDD 0.45 V • Power supply voltage rejection ratio (PSRR) The power supply voltage rejection ratio (PSRR) can be calculated by the following expression, with VOUT measured at each VDD. Test conditions: When VDD = 0.9 V: VDD = VDD1, VOUT = VOUT1, When VDD = 5.5 V: VDD = VDD2, VOUT = VOUT2 PSRR = 20 log VDD1 − VDD2 VOUT1 − VOUT2 × RF + RS RS Figure 8 2. Input offset voltage RF RS RS RF + − VOUT VDD VCMR = VDD / 2 • Input offset voltage (VIO) VIO = VOUT − VDD 2 × RS RF + RS Figure 9 |
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