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WM8734 Datasheet(PDF) 7 Page - List of Unclassifed Manufacturers

Part # WM8734
Description  STEREO AUDIO CODEC
PDF  42 Pages
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Manufacturer  ETC [List of Unclassifed Manufacturers]
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WM8734 Datasheet(HTML) 7 Page - List of Unclassifed Manufacturers

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WM8734
Advanced Information
w
AI Rev 2.2 November 2001
7
MASTER CLOCK TIMING
MCLK
t
MCLKL
t
MCLKH
t MCLKY
Figure 1 System Clock Timing Requirements
Test Conditions
AVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 3.3V, DGND = 0V, TA = +25
oC, Slave Mode, fs = 48kHz, MCLK = 256fs unless
otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
System Clock Timing Information
MCLK System clock pulse width high
TXTIH
18
ns
MCLK System clock pulse width low
TXTIL
18
ns
MCLK System clock cycle time
TXTIY
54
ns
MCLK Duty cycle
40:60
60:40
DIGITAL AUDIO INTERFACE – MASTER MODE
BCLK
ADCDAT
ADCLRC
DACDAT
DACLRC
WM8734
CODEC
DSP
ENCODER/
DECODER
Figure 2 Master Mode Connection



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