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IC-PVL Datasheet(PDF) 11 Page - IC-Haus GmbH |
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IC-PVL Datasheet(HTML) 11 Page - IC-Haus GmbH |
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11 / 33 page ![]() preliminary preliminary iC-PVL LINEAR/OFF-AXIS BATTERY-BUFFERED HALL MULTITURN ENCODER Rev B3, Page 11/33 REGISTER MAP (iC-PVL during I2C slave mode, ID = 0b1100 001) OVERVIEW Addr Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Interface and Hall Signal Processing 0x00 EN_PAR EN_ERR DIR ST_GRAY MT_GRAY INT_MODE 0x01 OS MT_BW 0x02 PCR Battery Monitor, Bias and Oscillators 0x03 EN_WRN BAT_MON A_MAX IBIAS Miscellaneous 0x04 0 0 0 0 0 ONAX POLEWID 0x05 I2C_POS PCR_OUT SYNC_BW BAT_THR HYS ABQUAD CRC Configuration (inverted) 0x06 CRC_CFG(7:0) Multiturn Counter: Current Count (PCR_OUT = 0) Multiturn Counter: Current Count (PCR_OUT = 1) 0x07 MT_COUNT(7:0) Current PCR(7:0) 0x08 MT_COUNT(15:8) MT_COUNT(7:0) 0x09 MT_COUNT(23:16) MT_COUNT(15:8) 0x0A MT_COUNT(31:24) MT_COUNT(23:16) 0x0B MT_COUNT(39:32) MT_COUNT(31:24) CRC Counter (inverted) 0x0C CRC_CTR(7:0) Synchronization Bits (I2C slave mode read only) 0x0D 0 0 0 0 0 SYNC(2:0) 0x0E Reserved Chip Release (I2C slave mode read only) 0x0F CHIP_REL Status Register (I2C slave mode only) 0x10 PRESET PDR BAT_WRN BAT_ERR POS_ERR CTR_ERR CFG_ERR STUP_ERR Command Register (I2C slave mode write only) 0x11 CMD(7:0) Table 6: Register map during I2C slave mode REGISTER MAP (iC-PVL during I2C slave mode, ID = 0b1100 000) OVERVIEW Addr Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Status Register (I2C slave mode only) 0x00 PRESET PDR BAT_WRN BAT_ERR POS_ERR CTR_ERR CFG_ERR STUP_ERR Command Register (I2C slave mode write only) 0x01 CMD(7:0) Table 7: Register map during I2C slave mode |
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