ADV7174 datasheet(29/52 Pages) AD

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ADV7174/ADV7179

Rev. A | Page 29 of 52

MODE REGISTER 1 (MR1)

Bits:

MR17–MR10

Address:

SR4–SR0 = 01H

Figure 39 shows the various operations under the control of Mode Register 1. This register can be read from as well as written to.

MR11

MR10

MR17

MR12

MR13

MR15

MR16

MR14

CLOSED CAPTIONING

FIELD SELECTION

NO DATA OUT

ODD FIELD ONLY

EVEN FIELD ONLY

DATA OUT

(BOTH FIELDS)

MR12 MR11

DAC A

CONTROL

NORMAL

POWER-DOWN

MR16

RESERVED

DAC C

CONTROL

MR13

DAC B

CONTROL

MR15

INTERLACE

CONTROL

INTERLACED

NONINTERLACED

MR10

COLOR BAR

CONTROL

DISABLE

ENABLE

MR17

NORMAL

POWER-DOWN

NORMAL

POWER-DOWN

1 SHOULD BE

WRITTEN TO

THIS BIT

Figure 39. Mode Register 1

Table 10. MR1 Bit Description

Bit Name

Bit No.

Description

Interlace Control

MR10

This bit is used to set up the output to interlaced or noninterlaced mode. Power-down mode

is relevant only when the part is in composite video mode.

Closed Captioning Field

Selection

MR12–MR11

These bits control the fields on which closed captioning data is displayed; closed captioning

information can be displayed on an odd field, even field, or both fields.

DAC Control

MR16–MR15

and MR13

These bits can be used to power down the DACs. Power-down can be used to reduce the

power consumption of the ADV7174/ADV7179 if any of the DACs are not required in the

application.

Reserved

MR14

A Logic 1 must be written to this register.

Color Bar Control

MR17

This bit can be used to generate and output an internal color bar test pattern. The color bar

configuration is 100/7.5/75/7.5 for NTSC and 100/0/75/0 for PAL. It is important to note that

when color bars are enabled, the ADV7174/ADV7179 is configured in a master timing mode.

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