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LTC1966 Datasheet(PDF) 3 Page - Linear Technology |
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LTC1966 Datasheet(HTML) 3 Page - Linear Technology |
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3 / 32 page ![]() 3 LTC1966 sn1966 1966fas The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C. VDD = 5V, VSS = – 5V, VOUTRTN = 0V, CAVE = 10µF, VIN = 200mVRMS, VENABLE = 0.5V unless otherwise noted. ELECTRICAL CHARACTERISTICS Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The inputs (IN1, IN2) are protected by shunt diodes to VSS and VDD. If the inputs are driven beyond the rails, the current should be limited to less than 10mA. Note 3: The LTC1966 output (VOUT) is high impedance and can be overdriven, either sinking or sourcing current, to the limits stated. Note 4: The LTC1966C/LTC1966I are guaranteed functional over the operating temperature range of – 40 °C to 85°C. Note 5: The LTC1966C is guaranteed to meet specified performance from 0 °C to 70°C. The LTC1966C is designed, characterized and expected to meet specified performance from – 40 °C to 85°C but is not tested nor QA sampled at these temperatures. The LTC1966I is guaranteed to meet specified performance from – 40 °C to 85°C. Note 6: High speed automatic testing cannot be performed with CAVE = 10µF. The LTC1966 is 100% tested with CAVE = 22nF. Correlation tests have shown that the performance limits above can be guaranteed with the additional testing being performed to guarantee proper operation of all the internal circuitry. Note 7: High speed automatic testing cannot be performed with 60Hz inputs. The LTC1966 is 100% tested with DC and 10kHz input signals. Measurements with DC inputs from 50mV to 350mV are used to calculate the four parameters: GERR, VOOS, VIOS and linearity error. Correlation tests have shown that the performance limits above can be guaranteed with the additional testing being performed to guarantee proper operation of all internal circuitry. Note 8: The LTC1966 is inherently very linear. Unlike older log/antilog circuits, its behavior is the same with DC and AC inputs, and DC inputs are used for high speed testing. Note 9: The power supply rejections of the LTC1966 are measured with DC inputs from 50mV to 350mV. The change in accuracy from VDD = 2.7V to VDD = 5.5V with VSS = 0V is divided by 2.8V. The change in accuracy from VSS = 0V to VSS = –5.5V with VDD = 5.5V is divided by 5.5V. Note 10: Previous generation RMS-to-DC converters required nonlinear input stages as well as a nonlinear core. Some parts specify a “DC reversal error,” combining the effects of input nonlinearity and input offset voltage. The LTC1966 behavior is simpler to characterize and the input offset voltage is the only significant source of “DC reversal error.” SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Output Characteristics OVR Output Voltage Range q VSS VDD V ZOUT Output Impedance (Note 12) q 75 85 95 k Ω CMRRO Output Common Mode Rejection (Note 13) q 16 200 µV/V VOMAX Maximum Differential Output Swing Accuracy = 2%, DC Input (Note 14) 1.0 1.05 V q 0.9 V PSRRO Power Supply Rejection VDD Supply (Note 9) q 250 1000 µV/V VSS Supply (Note 9) q 50 500 µV/V Frequency Response f1P 1% Additional Error (Note 15) CAVE = 10µF6 kHz f10P 10% Additional Error (Note 15) CAVE = 10µF20 kHz f–3dB ±3dB Frequency (Note 15) 800 kHz Power Supplies VDD Positive Supply Voltage q 2.7 5.5 V VSS Negative Supply Voltage (Note 16) q – 5.5 0 V IDD Positive Supply Current IN1 = 20mV, IN2 = 0V q 155 170 µA IN1 = 200mV, IN2 = 0V 158 µA ISS Negative Supply Current IN1 = 20mV, IN2 = 0V q 12 20 µA Shutdown Characteristics IDDS Supply Currents VENABLE = 4.5V q 0.5 10 µA ISSS Supply Currents VENABLE = 4.5V q –1 –0.1 µA IIH ENABLE Pin Current High VENABLE = 4.5V q – 0.3 – 0.05 µA IIL ENABLE Pin Current Low VENABLE = 0.5V q –2 –1 – 0.1 µA VTH ENABLE Threshold Voltage VDD = 5V, VSS = – 5V 2.4 V VDD = 5V, VSS = GND 2.1 V VDD = 2.7V, VSS = GND 1.3 V VHYS ENABLE Threshold Hysteresis 0.1 V |
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