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LTC4211

4211f

In this fashion, the inrush current is controlled and CLOAD

is charged up slowly during the soft-start cycle.

The timing diagram in Figure 6 illustrates the operation of

the LTC4211 in a normal power-up sequence with limited

inrush current as described by Equation 6. At Time Point 5,

the GATE pin voltage begins to ramp indicating that the

power MOSFET is beginning to charge CLOAD. At Time

Point 5A, the inrush current causes a 50mV voltage drop

across RSENSE and the internal servo loop engages, limit-

ing the inrush current to a fixed level. At Time Point 6, the

GATE pin voltage continues to ramp as CLOAD charges until

VOUT reaches its final value. The charging current reduces,

and the internal servo loop disengages. At the end of the

soft-start cycle (Time Point 7), RESET is high and SLOW

COMP is armed.

PLUG-IN CYCLE

FIRST TIMING CYCLE

TIMER

VCC

3 4 5

RESET PULLED LOW DUE TO POWER BAD

200

µA

4211 F06

µA

VREF

µA

GATE

VOUT

POWER BAD

VFB < VREF

SLOW COMPARATOR ARMED

CHECK FOR GATE < 0.2V

FAST COMPARATOR ARMED

CHECK FOR FILTER LOW (<VREF – 80mV)

CHECK FOR FAULT HIGH (>VREF + 50mV)

ON GOES LOW

GATE

VOUT

ILOAD

RESET

SOFT-START CYCLE

SECOND TIMING CYCLE

POWER GOOD

VFB > VREF

LOAD CURRENT IS

REGULATING AT 50mV/RSENSE

Figure 6. Normal Power-Up Sequence (With Current Limiting in Second Timing Cycle)

FREQUENCY COMPENSATION AT SOFT-START

If the external gate input capacitance (CISS) is greater than

600pF, no external gate capacitor is required at GATE to

stabilize the internal current-limiting loop during soft-

start. Otherwise, connect a gate capacitor between the

GATE pin and ground to increase the total gate capacitance

to be equal to or above 600pF. The servo loop that controls

the external MOSFET during current limiting has a unity-

gain frequency of about 105kHz and phase margin of 80

for external MOSFET gate input capacitances to 2.5nF.

USING AN EXTERNAL GATE CAPACITOR

The LTC4211 automatically limits the inrush current in one

of two ways: by controlling the GATE pin voltage slew rate

OPERATIO

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