6

5

4

3

2

1

13

14

15

16

17

18

19

20

21

22

23

24

12

11

10

9

8

7

25

28

26

27

36

35

34

33

32

31

30

29

37

38

39

40

OUTDP1p

OUTDP3p

INDP1p

INDP0p

OUTDP0p

INDP2p

INDP2n

OUTDP1n

INDP1n

INDP0n

OUTDP3n

OUTDP0n

INDP3p

INDP3n

HPDIN/RSVD9

OUTDP2p

OUTDP2n

RSVD11

RSVD10

I2C_EN

SNOOPENZ/RSVD8

DPEQ0/A1

VCC

A0

Thermal Pad

GND

3

TDP142

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SLLSEZ1A – SEPTEMBER 2017 – REVISED OCTOBER 2017

Product Folder Links: TDP142

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Copyright © 2017, Texas Instruments Incorporated

(1)

Leave unconnected on PCB.

5 Pin Configuration and Functions

RNQ Package

40-Pin (WQFN)

Top View

Pin Functions

PIN

I/O

DESCRIPTION

NAME

NO.

VCC

1, 6, 20, 28

P

3.3-V Power Supply.

DPEQ1

2

4 Level I

DisplayPort Receiver EQ control. This along with DPEQ0 will select the DisplayPort receiver

equalization gain. Refer to Table 2 for equalization settings.

RSVD1

3

I

RSVD2

4

O

RSVD3

5

O

RSVD4

7

I

RSVD5

8

I

INDP0p

9

I

DP Differential positive input for DisplayPort Lane 0.

INDP0n

10

I

DP Differential negative input for DisplayPort Lane 0.

A0

11

4 Level I

When I2C_EN = 0, leave the pin unconnected. When I2C_EN is not ‘0’, this pin will also set the

INDP1p

12

Diff I

DP Differential positive input for DisplayPort Lane 1.

INDP1n

13

Diff I

DP Differential negative input for DisplayPort Lane 1.

DPEQ0/A1

14

4 Level I

DisplayPort Receiver EQ control. This along with DPEQ1 will select the DisplayPort receiver

equalization gain. Refer to Table 2 for equalization settings. When I2C_EN is not ‘0’, this pin will

INDP2p

15

Diff I

DP Differential positive input for DisplayPort Lane 2.

INDP2n

16

Diff I

DP Differential negative input for DisplayPort Lane 2.