TPS40020

TPS40021

SLUS535C − MARCH 2003 − REVISED SEPTEMBER 2004

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23

REFERENCE DESIGN

This design used the TPS40020 PWM controller to facilitate a step-down application from 3.3-V to 1.5 V. (see

Figure 29) Design specifications include:

DESIGN PROCEDURE

Setting the Frequency

Choosing the optimum switching frequency is complicated. The higher the frequency, the smaller the

inductance and capacitance needed, so the smaller the size, but then the the switching losses are higher, the

efficiency is poorer. For this evaluation module, 300 kHz is chosen for reasonable efficiency and size.

A resistor R4, which is connected from pin 7 to ground, programs the oscillator frequency. The approximate

operating frequency is calculated in equation (3)

R

37.736

f

OSC

(kHz)

* 5.09 (kW)

Inductance Value

The inductance value can be calculated by equation (2).

L

V

OUT

f

I

RIPPLE

1

*

V

OUT

V

IN(max)

losses.

Based on 24% ripple current and 300 kHz, the inductance value is calculated to 0.71

µH and a 0.75-µH inductor

(part number is CDEP149−0R7) is chosen. The DCR of this inductor is 1.1 m

Ω and the loss is 440 mW, which

is approximately 1.5% of output power.

C

I

RIPPLE

8

f

V

RIPPLE

ESR

V

RIPPLE

I

RIPPLE

With 1.2% output voltage ripple, the needed capacitance is at least 109

µF and its ESR should be less than

3.75 m

Ω. Three 2-V, 470-µF, POSCAP capacitors from Sanyo are used. The ESR is 10 mΩ each.

The required input capacitance is calculated in equation (5). The calculated value is approximately 390

µF for

a 100-mV input ripple. Three 6.0-V, 330-

µF POSCAP capacitors with 10 mΩ ESR are used to handle 10 A of

RMS input current. Additionally, two ceramic capacitors are used to reduce the switching ripple current.

C

D

(max)

1

f

OSC

V

IN(ripple)

(4)

(5)

(6)

(7)

(8)