220

The modulator transfer function is the small-signal transfer

gain and the output filter, with a double pole break frequency

oscillator voltage,

Modulator Break Frequency Equations

The compensation network consists of the error amplifier

a closed loop transfer function with an acceptable 0dB

Phase margin is the difference between the closed loop

the compensation network’s poles, zeros and gain to the

components (R1 , R2, R3, C1, C2, and C3) in Figure 11.

Use these guidelines for locating the poles and zeros of the

compensation network:

1. Pick Gain (R2/R1) for desired converter bandwidth

6. Check Gain against Error Amplifier’s Open-Loop Gain

7. Estimate Phase Margin - Repeat if Necessary

Compensation Break Frequency Equations

Figure 12 shows an asymptotic plot of the DC-DC

converter’s gain vs frequency. The actual modulator gain

which is not shown in Figure 12. Using the above guidelines

should yield a compensation gain similar to the curve

plotted. The open loop error amplifier gain bounds the

with the capabilities of the error amplifier. The closed loop

gain is constructed on the log-log graph of Figure 12 by

adding the modulator gain (in dB) to the compensation gain

(in dB). This is equivalent to multiplying the modulator

transfer function to the compensation transfer function and

plotting the gain.

The compensation gain uses external impedance networks

stable control loop has a 0dB gain crossing with

-20dB/decade slope and a phase margin greater than 45

degrees. Include worst case component variations when

determining phase margin.

Component Selection Guidelines

Output Capacitor Selection

The output capacitors for each output have unique

requirements. In general the output capacitors should be

selected to meet the dynamic regulation requirements.

Additionally, the PWM converters require an output

capacitor to filter the current ripple. The linear regulator is

internally compensated and requires an output capacitor that

meets the stability requirements. The load transient for the

microprocessor core requires high quality capacitors to

supply the high slew rate (di/dt) current demands.

PWM Output Capacitors

Modern microprocessors produce transient load rates above

10A/ns. High frequency capacitors initially supply the

transient and slow the current load rate seen by the bulk

capacitors. The bulk filter capacitor values are generally

determined by the ESR (effective series resistance) and ESL

(effective series inductance) parameters rather than actual

capacitance.

High frequency decoupling capacitors should be placed as

close to the power pins of the load as physically possible. Be

careful not to add inductance in the circuit board wiring that

could cancel the usefulness of these low inductance

components. Consult with the manufacturer of the load on

specific decoupling requirements.

Use only specialized low-ESR capacitors intended for

switching regulator applications for the bulk capacitors. The

bulk capacitor’s ESR determines the output ripple voltage

and the initial voltage drop after a high slew-rate transient.

An aluminum electrolytic capacitor’s ESR value is related to

F

LC

1

2

π

L

O

C

O

×

×

----------------------------------------

=

F

ESR

1

2

π ESR C

O

×

×

-----------------------------------------

=

F

Z1

1

2

π R

× 2C1

×

-----------------------------------

=

F

Z2

1

2

π

R1

R3

+

() C3

×

×

-------------------------------------------------------

=

F

P1

1

2

π R

2

C1

C2

×

C1

C2

+

----------------------





×

×

-------------------------------------------------------

=

F

P2

1

2

π R

× 3C3

×

-----------------------------------

=

100

80

60

40

20

0

-20

-40

-60

10M

1M

100K

10K

1K

100

10

OPEN LOOP

ERROR AMP GAIN

20LOG

COMPENSATION

FREQUENCY (Hz)

GAIN

20LOG

MODULATOR

GAIN

FIGURE 12. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN

CLOSED LOOP

GAIN

HIP6017