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MB91307 Datasheet(PDF) 8 Page - fujitsu semiconductor |
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MB91307 Datasheet(HTML) 8 Page - fujitsu semiconductor |
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8 / 96 page ![]() MB91307 Series 8 (Continued) Pin no. Pin name I/O circuit type Description 49 DREQ1 F DMA external transfer request input. When selected as a DMA startup source, this input is in use at all times, so that output from other functions must be stopped unless used intentionally. PB3 General purpose input/output port. 50 DACK1 F DMA external transfer request acknowledge output. This function is valid when the DMA transfer request acknowledge output setting is enabled. PB4 General purpose input/output port. This function is enabled when the DNA transfer request acknowledge output setting is disabled. 51 DEOP1 F DMA external transfer end output. This function is valid when the DMA external transfer end output setting is enabled. DSTP1 DMA external transfer stop input. This function is valid when the DMA ex- ternal transfer stop input setting is enabled. PB5 General purpose input/output port. This function is valid when the DMA external transfer end output selection and the DMA external transfer stop input selection are disabled. 53 X1 A Clock (oscillator) output 54 X0 Clock (oscillator) input 56 IOWR F Write strobe output for DMA fly-by transfer. This function is valid when the DMA fly-by transfer write strobe output setting is enabled. PB6 General purpose input/output port. This function is valid when the DMA fly-by transfer write strobe output setting is disabled. 57 IORD F Read strobe output for DMA fly-by transfer. This function is valid when the DMA fly-by transfer read strobe output setting is enabled. PB7 General purpose input/output port. This function is valid when the DMA fly-by transfer read strobe output setting is disabled. 58 CS0 F Chip select output. This function is valid when the chip select 0 output setting is enabled. PA1 General purpose input/output port. This function is valid when the chip select 0 output setting is disabled. 59 CS1 F Chip select output. This function is valid when the chip select 1 output setting is enabled. PA1 General purpose input/output port. This function is valid when the chip select 1 output setting is disabled. 60 CS2 F Chip select output. This function is valid when the chip select 2 output setting is enabled. PA2 General purpose input/output port. This function is valid when the chip select 2 output setting is disabled. 61 CS3 F Chip select output. This function is valid when the chip select 3 output setting is enabled. PA3 General purpose input/output port. This function is valid when the chip select 3 output setting is disabled. |
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