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Data Sheet

AD7982

Rev. D | Page 19 of 25

CS MODE, 3-WIRE WITH BUSY INDICATOR

CS mode, 3-wire with busy indicator is usually used when a

single AD7982 is connected to an SPI-compatible digital host

having an interrupt input.

The connection diagram is shown in Figure 31, and the

corresponding timing is given in Figure 32.

With SDI tied to VIO, a rising edge on CNV initiates a

conversion, selects the CS mode, and forces SDO to high

impedance. SDO is maintained in high impedance until the

completion of the conversion irrespective of the state of CNV.

Prior to the minimum conversion time, CNV can be used to

select other SPI devices, such as analog multiplexers, but CNV

must be returned low before the minimum conversion time

elapses and then held low for the maximum possible conversion

time to guarantee the generation of the busy signal indicator.

When the conversion completes, SDO goes from high impedance

to low impedance. With a pull-up resistor on the SDO line, the

high impedance to low impedance transition can be used as an

interrupt signal to initiate the data reading controlled by the digital

host. The AD7982 then enters the acquisition phase and powers

down. The data bits are then clocked out, MSB first, by subsequent

SCK falling edges. The data is valid on both SCK edges. Although

the rising edge can be used to capture the data, a digital host using

the SCK falling edge allows a faster reading rate, provided it has an

acceptable hold time. After the optional 19th SCK falling edge

or when CNV goes high (whichever occurs first), SDO returns to

high impedance.

If multiple AD7982 devices are selected at the same time, the

SDO output pin handles this contention without damage or

induced latch-up. Meanwhile, it is recommended to keep this

contention as short as possible to limit extra power dissipation.

AD7982

SDI

SDO

CNV

SCK

CONVERT

DATA IN

CLK

DIGITAL HOST

VIO

IRQ

VIO

47kΩ

Figure 31. CS Mode, 3-Wire with Busy Indicator Connection Diagram (SDI High)

SDO

D17

D16

tDIS

SCK

tSCK

tSCKL

tSCKH

tHSDO

tDSDO

CNV

CONVERSION

ACQUISITION

tCONV

tCYC

ACQUISITION

SDI = 1

tCNVH

tACQ

Figure 32. CS Mode, 3-Wire with Busy Indicator Serial Interface Timing (SDI High)

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