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AD7982 Datasheet(PDF) 24 Page - Analog Devices

Part # AD7982
Description  18-Bit, 1 MSPS PulSAR 7 mW ADC in MSOP/LFCSP
PDF  26 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7982 Datasheet(HTML) 24 Page - Analog Devices

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Data Sheet
AD7982
Rev. D | Page 23 of 25
CHAIN MODE WITH BUSY INDICATOR
Chain mode with busy indicator can also daisy-chain multiple
AD7982 devices on a 3-wire serial interface while providing a
busy indicator. This chain mode with busy indicator feature
reduces component count and wiring connections, for example,
in isolated multiconverter applications or for systems with a
limited interfacing capacity. Data readback is analogous to
clocking a shift register.
Figure 39 shows a connection diagram example using three
AD7982 devices, and Figure 40 shows the corresponding timing.
When SDI and CNV are low, SDO is driven low. With SCK
high, a rising edge on CNV initiates a conversion, selects the
chain mode, and enables the busy indicator feature.
In this mode, CNV is held high during the conversion phase
and the subsequent data readback. When all ADCs in the chain
have completed their conversions, the SDO pin of the ADC
closest to the digital host (see the AD7982 ADC labeled C in
Figure 39) is driven high. The transition of driving the SDO pin
of the ADC to high can be used as a busy indicator to trigger the
data readback controlled by the digital host. The AD7982 then
enters the acquisition phase and powers down. The data bits
stored in the internal shift register are clocked out, MSB first, by
subsequent SCK falling edges. For each ADC, SDI feeds the
input of the internal shift register and is clocked by the SCK
falling edge. Each ADC in the chain outputs its data MSB first,
and 18 × N + 1 clocks are required to read back the N ADCs.
Although the rising edge can capture the data, a digital host using
the SCK falling edge allows a faster reading rate and
consequently more AD7982 devices in the chain, provided the
digital host has an acceptable hold time.
CONVERT
DATA IN
CLK
DIGITAL HOST
AD7982
SDI
SDO
CNV
C
SCK
AD7982
SDI
SDO
CNV
A
SCK
IRQ
AD7982
SDI
SDO
CNV
B
SCK
Figure 39. Chain Mode with Busy Indicator Connection Diagram
SDOA = SDIB
DA17 DA16 DA15
SCK
123
39
53
54
tEN
CONVERSION
ACQUISITION
tCONV
tCYC
tACQ
ACQUISITION
CNV = SDIA
DA1
417
tSCK
tSCKH
tSCKL
DA0
19
38
18
SDOB = SDIC
DB17 DB16 DB15
DA1
DB1DB0DA17 DA16
55
tSSDISCK
tHSDISCK
tHSDO
tDSDO
SDOC
DC17 DC16 DC15
DA1DA0
DC1DC0DA16
21
35
36
20
37
DB1DB0DA17
DB17 DB16
tDSDOSDI
tSSCKCNV
tHSCKCNV
DA0
tDSDOSDI
tDSDOSDI
tDSDOSDI
tDSDOSDI
Figure 40. Chain Mode with Busy Indicator Serial Interface Timing



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