AD5040/5060

Preliminary Technical Data

Rev. PrC | Page 16 of 17

where

D represents the input code in decimal (0–65535).

With

VDD = 5 V, R1 = R2 = 10 kW:

This is an output voltage range of ±5 V with 0000Hex

corresponding to a –5 V output and 3FFF Hex

corresponding to a +5 V output.

Figure 30. Bipolar Operation with the AD5040/AD5060

Using AD5040/AD5060 with an Opto-Isolated

Interface

In process-control applications in industrial environments it is

often necessary to use an opto-isolated interface to protect and

isolate the controlling circuitry from any hazardous common-

mode voltages that may occur in the area where the DAC is

functioning. Because the AD5040/AD5060 uses a three-wire

serial logic interface, the ADuM130Xifamily s an ideal way to

provide digital isolation for the DAC interface.

The ADuM130x isolators provide three independent isolation

channels in a variety of channel configurations and data rates.

They operate across the full range from 2.7V to 5.5V, providing

compatibility with lower voltage systems as well as enabling a

voltage translation functionality across the isolation barrier.

Figure 31. The power supply to the part also needs to be

isolated. This is done by using a transformer. On the DAC side

of the transformer, a +5 V regulator provides the +5 V supply

required for the AD5040/AD5060.

0.1. F

+5V

REGULATOR

GND

DIN

SCLK

POWER

10. F

SCLK

DATA

DAC

SDI

ADMu103x

SDI

V1A

V1B

V1C

VOA

VOB

VOC

Figure 31. AD5040/AD5060 with An Opto-Isolated Interface

Power Supply Bypassing and Grounding

When accuracy is important in a circuit it is helpful to carefully

consider the power supply and ground return layout on the

board. The printed circuit board containing the

AD5040/AD5060 should have separate analog and digital

sections, each having its own area of the board. If the

AD5040/AD5060 is in a system where other devices require an

AGND to DGND connection, the connection should be

made at one point only. This ground point should be

as close as possible to the AD5040/AD5060.

The power supply to the AD5040/AD5060 should be

bypassed with

10 µF and 0.1 µF capacitors. The capacitors should be

physically as close as possible to the device with the 0.1 µF

capacitor ideally right up against the device. The 10 µF

capacitors are the tantalum bead type. It is important that the

0.1 µF capacitor has low Effective Series Resistance (ESR) and

Effective Series Inductance (ESI), e.g., common ceramic types

of capacitors. This 0.1 µF capacitor provides a low impedance

path to ground for high frequencies caused by transient

currents due to internal logic switching.

The power supply line itself should have as large a trace as

possible to provide a low impedance path and reduce glitch

effects on the supply line. Clocks and other fast switching

digital signals should be shielded from other parts of

the board by digital ground. Avoid crossover of digital and

analog signals if possible. When traces cross on opposite sides

of the board, ensure that they run at right angles to each other

to reduce feedthrough effects through the board. The best

board layout technique is the microstrip technique where the

component side of the board is dedicated to the ground plane

only and the signal traces are placed on the solder side.

However, this is not always possible with a two-layer board.