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AD7328

Data Sheet

Rev. C | Page 30 of 36

POWER VS. THROUGHPUT RATE

The power consumption of the AD7328 varies with the throughput

rate. The static power consumed by the AD7328 is very low, and

significant power savings can be achieved as the throughput rate is

reduced. Figure 51 and Figure 52 show the power vs. throughput

rate for the AD7328 at a VCC of 3 V and 5 V, respectively. Both

plots clearly show that the average power consumed by the AD7328

is greatly reduced as the sample frequency is reduced. This is true

whether a fixed SCLK value is used or the SCLK value is scaled

with the sampling frequency. Figure 51 and Figure 52 show the

power consumption when operating the device in normal mode

for a fixed 20 MHz SCLK and a variable SCLK that scales with

the sampling frequency.

1100

THROUGHPUT RATE (kSPS)

100

200

300

400

500

600

700

800

900 1000

VARIABLE SCLK

20MHz SCLK

VCC = 3V

VDD/VSS = ±12V

TA = 25°C

INTERNAL REFERENCE

Figure 51. Power vs. Throughput Rate with 3 V VCC

1000

THROUGHPUT RATE (kHz)

100

200

300

400

500

600

700

800

900

20MHz SCLK

VARIABLE SCLK

VCC = 5V

VDD/VSS = ±12V

TA = 25°C

INTERNAL REFERENCE

Figure 52. Power vs. Throughput Rate with 5 V VCC

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