AD7623

Rev. 0 | Page 10 of 28

Pin No.

Mnemonic

Description

35

CNVST

DI

Conversion Start. A falling edge on CNVST puts the internal sample-and-hold into the hold state and

initiates a conversion.

36

AGND

P

Analog Power Ground Pin.

37

REF

AI/O

Reference Output/Input.

When PDREF/PDBUF = low, the internal reference and buffer are enabled, producing 2.048 V on this pin.

When PDREF/PDBUF = high, the internal reference and buffer are disabled, allowing an externally

supplied voltage reference up to AVDD volts. Decoupling is required with or without the internal

reference and buffer. Refer to the Voltage Reference Input section.

38

REFGND

AI

Reference Input Analog Ground.

39

IN−

AI

Differential Negative Analog Input.

43

IN+

AI

Differential Positive Analog Input.

45

TEMP

AO

Temperature Sensor Analog Output.

46

REFBUFIN

AI/O

Internal Reference Output/Reference Buffer Input.

When PDREF/PDBUF = low, the internal reference and buffer are enabled, producing the 1.2 V (typical)

band gap output on this pin, which needs external decoupling. The internal fixed gain reference buffer

uses this to produce 2.048V on the REF pin.

When using an external reference with the internal reference buffer (PDBUF = low, PDREF = high),

applying 1.2 V on this pin produces 2.048 V on the REF pin. Refer to the Voltage Reference Input section.

47

PDREF

DI

Internal Reference Power-Down Input.

When low, the internal reference is enabled.

When high, the internal reference is powered down, and an external reference must be used.

48

PDBUF

DI

Internal Reference Buffer Power-Down Input.

When low, the buffer is enabled (must be low when using internal reference).

When high, the buffer is powered-down.