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AD7266 Datasheet(PDF) 15 Page - Analog Devices |
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AD7266 Datasheet(HTML) 15 Page - Analog Devices |
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15 / 29 page  AD7266 Rev. B | Page 14 of 28 VDD C1 D D VIN+ R1 C2 VDD C1 D D VIN– R1 C2 Figure 18. Equivalent Analog Input Circuit, Conversion Phase—Switches Open, Track Phase—Switches Closed When no amplifier is used to drive the analog input, the source impedance should be limited to low values. The maximum source impedance depends on the amount of THD that can be toler- ated. The THD increases as the source impedance increases and performance degrades. Figure 19 shows a graph of the THD vs. the analog input signal frequency for different source impedances in single-ended mode, while Figure 20 shows the THD vs. the analog input signal frequency for different source impedances in differential mode. INPUT FREQUENCY (kHz) 600 0 200 100 400 300 500 –50 –60 –55 –65 –70 –75 –80 –85 –90 FSAMPLE = 1.5MSPS VDD = 3V RANGE = 0V TO VREF RSOURCE = 300Ω RSOURCE = 0Ω RSOURCE = 10Ω RSOURCE = 47Ω RSOURCE = 100Ω Figure 19. THD vs. Analog Input Frequency for Various Source Impedances, Single-Ended Mode INPUT FREQUENCY (kHz) 600 700 800 900 1000 0 200 100 400 300 500 –60 –65 –70 –75 –80 –85 –90 FSAMPLE = 1.5MSPS VDD = 3V RANGE = 0V TO VREF RSOURCE = 300Ω RSOURCE = 0Ω RSOURCE = 10Ω RSOURCE = 47Ω RSOURCE = 100Ω Figure 20. THD vs. Analog Input Frequency for Various Source Impedances, Differential Mode Figure 21 shows a graph of the THD vs. the analog input frequency for various supplies while sampling at 2 MSPS. In this case, the source impedance is 47 Ω. INPUT FREQUENCY (kHz) 600 700 800 900 1000 0 200 100 400 300 500 –50 –60 –55 –65 –70 –75 –80 –85 –90 VDD = 3V SINGLE-ENDED MODE VDD = 5V SINGLE-ENDED MODE VDD = 3V DIFFERENTIAL MODE VDD = 5V DIFFERENTIAL MODE FSAMPLE = 1.5MSPS/2MSPS VDD = 3V/5V RANGE = 0 TO VREF Figure 21. THD vs. Analog Input Frequency for Various Supply Voltages ANALOG INPUTS The AD7266 has a total of 12 analog inputs. Each on-board ADC has six analog inputs that can be configured as six single- ended channels, three pseudo differential channels, or three fully differential channels. These may be selected as described in the Analog Input Selection section. Single-Ended Mode The AD7266 can have a total of 12 single-ended analog input channels. In applications where the signal source has high impedance, it is recommended to buffer the analog input before applying it to the ADC. The analog input range can be programmed to be either 0 to VREF or 0 to 2 × VREF. If the analog input signal to be sampled is bipolar, the internal reference of the ADC can be used to externally bias up this signal to make it correctly formatted for the ADC. Figure 22 shows a typical connection diagram when operating the ADC in single-ended mode. VIN 0V +1.25V –1.25V DCAPA/DCAPB VA1 AD72661 VB6 R R 3R R 0V +2.5V 0.47µF 1ADDITIONAL PINS OMITTED FOR CLARITY. Figure 22. Single-Ended Mode Connection Diagram |
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