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MB91F128 Datasheet(PDF) 39 Page - fujitsu semiconductor |
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MB91F128 Datasheet(HTML) 39 Page - fujitsu semiconductor |
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39 / 50 page  MB91F127/F128 39 (9) UART Timing (VCC = 3.3 V ± 0.3 V, VSS = 0 V, TA = −30 °C to +70 °C) * : tCYCP is a cycle time of peripheral system clock. Internal shift clock mode External shift clock mode Parameter Symbol Pin name Condition Value Unit Remarks Min Max Serial clock cycle time tSCYC Internal shift clock mode 8 tCYCP* ns SC ↓ → SO delay time tSLOV −10 +50 ns Valid SI → SC↑ tIVSH 50 ns SC ↑ → Valid SI hold time tSHIX 50 ns Serial clock “H” pulse width tSHSL External shift clock mode 4 tCYCP* − 10 ns Serial clock “L” pulse width tSLSH 4 tCYCP* − 10 ns SC ↓ → SO delay time tSLOV 050 ns Valid SI → SC↑ tIVSH 50 ns SC ↑ → Valid SI hold time tSHIX 50 ns Serial busy time tBUSY 6 tCYCP*ns CS ↓ → SC, SO delay time tCLZO 50 ns CS ↓ → SC input mask time tCLSL 3 tCYCP*ns SC ↑ → SC, SO Hi-z time tCHOZ 50 ns SC SO SI tSHIX tIVSH tSLOV tSCYC SC SO SI CS tCHOZ tBUSY tCLSL tIVSH tSHIX tSLOV tSLSH tCLZO tSHSL |
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