AD7864 datasheet(20/29 Pages) AD

20 / 29 page

AD7864

Rev. D | Page 19 of 28

When reading the output data registers after a conversion

sequence, that is, when BUSY goes low, the register pointer is

incremented on the rising edge of the RD signal, as shown in

. However, when reading the conversion results during

the conversion sequence, the pointer is not incremented until a

valid conversion result is in the register to be addressed. In this

case, the pointer is incremented when the conversion has ended

and the result has been transferred to the output data register.

This happens immediately before

Figure 14

EOC goes low, therefore EOC

may be used to enable the register contents onto the data bus,

as described in the

subsection within the

section. The pointer is reset to point

to Register 1 on the rising edge of the

Reading Between Each Conversion in the

Conversion Sequence

Selecting a

Conversion Sequence

RD signal when the last

conversion result in the sequence is being read. In the example

shown, this means that the pointer is set to Register 1 when the

contents of Register 3 are read.

DB0 TO DB11

OUTPUT

DRIVERS

OE NO. 1

NOT VALID

(VIN3)

(VIN1)

(VIN4)

OE NO. 2

OE NO. 3

OE NO. 4

2-BIT

COUNTER

VDRIVE

RESET

OUTPUT DATA REGISTERS

*THE POINTER IS NOT INCREMENTED BY A RISING EDGE ON RD UNTIL

THE CONVERSION RESULT IS IN THE OUTPUT DATA REGISTER. THE POINTER

IS RESET WHEN THE LAST CONVERSION RESULT IS READ.

FRSTDATA

POINTER*

AD7864

Figure 14. Output Data Registers

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