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TSB41BA3 Datasheet(PDF) 9 Page - Texas Instruments

Part # TSB41BA3
Description  IEEE1394B THREE PORT CABLE TRANSCEIVER/ARBITER
PDF  63 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TSB41BA3 Datasheet(HTML) 9 Page - Texas Instruments

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TSB41BA3
IEEE 1394b THREEPORT CABLE TRANSCEIVER/ARBITER
SLLS155A − MAY 2003 − REVISED OCTOBER 2003
9
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
Terminal Functions (Continued)
TERMINAL
I/O
DESCRIPTION
NAME
TYPE
NO.
I/O
DESCRIPTION
PLLVDD-1.8
Supply
29,
30
−
PLL 1.8-V circuit power terminals. A combination of high-frequency decoupling capacitors near each
terminal are suggested, such as paralleled 0.1
µF and 0.001 µF. An additional 1-µF capacitor is
required for voltage regulation. The PLLVDD-1.8 terminals must be separate from the DVDD-1.8
terminals. These supply terminals are separated from the DVDD-1.8, DVDD-3.3, PLLVDD-3.3 and
AVDD-3.3 terminals internal to the device to provide noise isolation.
PLLVDD-3.3
Supply
31
−
PLL 3.3-V circuit power terminal. A combination of high-frequency decoupling capacitors near the
terminal are suggested, such as paralleled 0.1
µF and 0.001 µF. Lower frequency 10-µF filtering
capacitors are also recommended. This supply terminal is separated from the DVDD-1.8, DVDD-3.3,
PLLVDD-1.8, and AVDD-3.3 terminals internal to the device to provide noise isolation. The DVDD-3.3
terminals must be tied together at a low-impedance point on the circuit board. The PLLVDD-3.3,
AVDD-3.3, and DVDD-3.3 terminals must be tied together with a low dc impedance connection.
RESETz
CMOS
75
I
Logic reset input. Asserting this terminal low resets the internal logic. An internal pullup resistor to VDD
is provided so only an external delay capacitor is required for proper power-up operation (see power-up
reset in the APPLICATIONS INFORMATION section). The RESETz terminal also incorporates an
internal pulldown which is activated when the PD input is asserted high. This input is otherwise a
standard logic input, and can also be driven by an open-drain type driver.
R0
R1
Bias
23
22
−
Current setting resistor terminals. These terminals are connected to a precision external resistance to
set the internal operating currents and cable driver output currents. A resistance of 6.34 k
Ω ±1% is
required to meet the IEEE Std 1394-1995 output voltage limits.
SE
CMOS
35
I
Test control input. This input is used in the manufacturing test of the TSB41BA3. For normal use this
terminal must be pulled low either through a 1-k
Ω resistor to GND or directly to GND.
SLPEN
CMOS
79
I
Automotive sleep mode enable input. This terminal is used to enable the automotive sleep mode.
When deasserted, normal 1394.b functionality is maintained.
SM
CMOS
36
I
Test control input. This input is used in the manufacturing test of the TSB41BA3. For normal use this
terminal must be pulled low either through a 1-k
Ω resistor to GND or directly to GND.
S2_PC0
S1_PC1
S0_PC2
CMOS
66
67
68
I
Port sleep/mode selection terminals 2−0 and power class programming. On hardware reset, this
terminal when used with the other 5 selection pins allows the user to select the speed and mode of the
ports. See Table 1. Depending on the selection these inputs may set the default value of the power
class indicated during self-ID.
Programming is done by tying the terminals high through a 1-k
Ω or smaller resistor or by tying directly to
ground through a 1-k
Ω or smaller resistor. Bus holders are built into these terminals.
S3_DS0
CMOS
33
I
Port sleep/mode selection terminal 3. On hardware reset, this terminal when used with the other 5
selection pins allows the user to select the speed and mode of the ports. See Table 1. Programming is
done by tying the terminals high through a 1-k
Ω or smaller resistor or by tying directly to ground through
a 1-k
Ω or smaller resistor. A bus holder is built into this terminal.
S4_DS1
CMOS
32
I
Port sleep/mode selection terminal 4. On hardware reset, this terminal when used with the other 5
selection pins allows the user to select the speed and mode of the ports. See Table 1. Programming is
done by tying the terminals high through a 1-k
Ω or smaller resistor or by tying directly to ground through
a 1-k
Ω or smaller resistor. A bus holder is built into this terminal.



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